{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,13]],"date-time":"2026-01-13T21:56:12Z","timestamp":1768341372635,"version":"3.49.0"},"reference-count":49,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Inform. Theory"],"published-print":{"date-parts":[[2019,10]]},"DOI":"10.1109\/tit.2019.2918209","type":"journal-article","created":{"date-parts":[[2019,5,22]],"date-time":"2019-05-22T20:39:40Z","timestamp":1558557580000},"page":"6146-6159","source":"Crossref","is-referenced-by-count":9,"title":["Context-Aware Resiliency: Unequal Message Protection for Random-Access Memories"],"prefix":"10.1109","volume":"65","author":[{"ORCID":"https:\/\/2.zoppoz.workers.dev:443\/https\/orcid.org\/0000-0001-9519-5143","authenticated-orcid":false,"given":"Clayton","family":"Schoeny","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/2.zoppoz.workers.dev:443\/https\/orcid.org\/0000-0003-0379-2827","authenticated-orcid":false,"given":"Frederic","family":"Sala","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/2.zoppoz.workers.dev:443\/https\/orcid.org\/0000-0001-8370-4158","authenticated-orcid":false,"given":"Mark","family":"Gottscho","sequence":"additional","affiliation":[]},{"given":"Irina","family":"Alam","sequence":"additional","affiliation":[]},{"given":"Puneet","family":"Gupta","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/2.zoppoz.workers.dev:443\/https\/orcid.org\/0000-0003-3736-4345","authenticated-orcid":false,"given":"Lara","family":"Dolecek","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ALLERTON.2017.8262803"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2017.8006651"},{"key":"ref33","first-page":"111","article-title":"Symbol-by-symbol MAP decoding of variable length codes","author":"bauer","year":"2000","journal-title":"Proc ITG Conf Source Channel Coding"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/26.803493"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/26.412719"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/18.272478"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/GLOCOM.2016.7841934"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2006.879330"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TWC.2005.847032"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/26.843191"},{"key":"ref28","doi-asserted-by":"crossref","first-page":"377","DOI":"10.1145\/2370816.2370870","article-title":"Base-Delta-Immediate Compression: Practical Data Compression for On-Chip Caches","author":"gennady pekhimenko","year":"2012","journal-title":"In International Conference on Parallel Architectures and Compilation Techniques (PACT)"},{"key":"ref27","article-title":"Frequent pattern compression: A significance-based compression scheme for L2 caches","volume":"1500","author":"alameldeen","year":"2004"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/26.87173"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DSN-W.2018.00048"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ITW.2017.8278033"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2014.2332364"},{"key":"ref22","first-page":"1","article-title":"A white paper on the benefits of chipkill-correct ECC for PC server main memory","volume":"11","author":"dell","year":"1997","journal-title":"IBM Microelectronics Division"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1676056"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2015.2462846"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2009.2032819"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360154"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2010.2043769"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1967.1054054"},{"key":"ref11","year":"2018","journal-title":"Qualcomm Centriq 2400 Processor"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2012.2235120"},{"key":"ref12","article-title":"White paper: The AMD athlon MP processor with 512KB L2 cache","author":"huynh","year":"2003"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2003.1196116"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1147\/rd.461.0005","article-title":"POWER4 system microarchitecture","volume":"46","author":"tendler","year":"2002","journal-title":"IBM J Res Develop"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830804"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892185"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.856487"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1981.1056327"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1959.1057524"},{"key":"ref4","article-title":"Opportunistic memory systems in presence of hardware variability","author":"gottscho","year":"2017"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DSN-W.2016.67"},{"key":"ref6","article-title":"List decoding for noisy channels","author":"elias","year":"1957"},{"key":"ref5","article-title":"Software-defined ECC: Heuristic recovery from uncorrectable memory errors","author":"gottscho","year":"2017"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2007.911222"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44929-9_3"},{"key":"ref49","author":"waterman","year":"2018","journal-title":"Spike a RISC-V ISA Simulator—Git Commit 3bfc00e"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1555349.1555372"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2016.2630270"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.21236\/ADA605735"},{"key":"ref48","author":"waterman","year":"2018","journal-title":"RISC-V Proxy Kernel - git commit 85ae17a"},{"key":"ref47","author":"nguyen","year":"2018","journal-title":"RISC-V Tools (GNU Toolchain ISA Simulator Tests) - git commit 816a252"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1952.tb01393.x"},{"key":"ref41","article-title":"An algebraic approach to the association schemes of coding theory","author":"delsarte","year":"1973"},{"key":"ref44","author":"bertsekas","year":"1999","journal-title":"Nonlinear Programming"},{"key":"ref43","author":"macwilliams","year":"1977","journal-title":"The Theory of Error Correcting Codes"}],"container-title":["IEEE Transactions on Information Theory"],"original-title":[],"link":[{"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/ieeexplore.ieee.org\/ielaam\/18\/8836351\/8720213-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"https:\/\/2.zoppoz.workers.dev:443\/http\/xplorestaging.ieee.org\/ielx7\/18\/8836351\/08720213.pdf?arnumber=8720213","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,9,18]],"date-time":"2022-09-18T12:39:07Z","timestamp":1663504747000},"score":1,"resource":{"primary":{"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/ieeexplore.ieee.org\/document\/8720213\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10]]},"references-count":49,"journal-issue":{"issue":"10"},"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/doi.org\/10.1109\/tit.2019.2918209","relation":{},"ISSN":["0018-9448","1557-9654"],"issn-type":[{"value":"0018-9448","type":"print"},{"value":"1557-9654","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,10]]}}}