{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,28]],"date-time":"2026-05-28T14:11:11Z","timestamp":1779977471205,"version":"3.53.1"},"reference-count":26,"publisher":"Association for Computing Machinery (ACM)","issue":"6","license":[{"start":{"date-parts":[[2026,5,28]],"date-time":"2026-05-28T00:00:00Z","timestamp":1779926400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/www.acm.org\/publications\/policies\/publication-rights-and-licensing-policy"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Commun. ACM"],"published-print":{"date-parts":[[2026,6,1]]},"abstract":"<jats:p>Embedded applications extract the best power\u2013performance trade-off from digital signal processors (DSPs) by making extensive use of vectorized execution. Rather than handwriting the many customized kernels these applications use, DSP engineers rely on auto-vectorizing compilers to quickly produce effective code. Building these compilers is a large and error-prone investment, and each new DSP architecture or application-specific ISA customization must repeat this effort to derive a new high-performance compiler.<\/jats:p>\n                  <jats:p>\n                    We present Isaria, a framework for automatically generating vectorizing compilers for DSP architectures. Isaria uses equality saturation to search for vectorized DSP code using a system of rewrite rules. Rather than hand-crafting these rules, Isaria automatically synthesizes sound rewrite rules from an ISA specification, discovers phase structure within these rules that improve compilation performance, and schedules their application at compile time while pruning intermediate states of the search. We use Isaria to generate a compiler for an industrial DSP architecture and show that the resulting kernels outperform existing DSP libraries by up to 6.9\n                    <jats:inline-formula>\n                      <mml:math xmlns:mml=\"https:\/\/2.zoppoz.workers.dev:443\/http\/www.w3.org\/1998\/Math\/MathML\" display=\"inline\">\n                        <mml:mo>\u00d7<\/mml:mo>\n                      <\/mml:math>\n                    <\/jats:inline-formula>\n                    and are competitive with those generated by expert-built compilers. We also demonstrate how Isaria can speed up exploration of new ISA customizations by automatically generating a high-quality vectorizing compiler.\n                  <\/jats:p>","DOI":"10.1145\/3802600","type":"journal-article","created":{"date-parts":[[2026,5,26]],"date-time":"2026-05-26T14:31:37Z","timestamp":1779805897000},"page":"97-105","update-policy":"https:\/\/2.zoppoz.workers.dev:443\/https\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Automatic Generation of Vectorizing Compilers for Customizable Digital Signal Processors"],"prefix":"10.1145","volume":"69","author":[{"given":"Samuel","family":"Thomas","sequence":"first","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"James","family":"Bornholt","sequence":"additional","affiliation":[{"name":"Amazon Web Services, Seattle, WA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2026,5,28]]},"reference":[{"key":"e_1_3_1_2_2","doi-asserted-by":"crossref","unstructured":"Ahmad M.B.S. et al. Vector instruction selection for digital signal processors using program synthesis.\u00a0In Proceedings of the 27th ACM Intern. Conf. on Architectural Support for Programming Languages and Operating Systems \u00a0Association for Computing Machinery\u00a0(2022) 1004\u20131016.","DOI":"10.1145\/3503222.3507714"},{"key":"e_1_3_1_3_2","doi-asserted-by":"publisher","DOI":"10.1145\/29873.29875"},{"key":"e_1_3_1_4_2","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446692"},{"key":"e_1_3_1_5_2","doi-asserted-by":"crossref","unstructured":"Franchetti F. and P\u00fcschel M. Generating simd vectorized permutations. Generating SIMD vectorized permutations. In Proceedings of the Joint European Confs. on Theory and Practice of Software 17th Intern. Conf. on Compiler Construction Springer-Verlag\u00a0(2008) 116\u2013131.","DOI":"10.1007\/978-3-540-78791-4_8"},{"key":"e_1_3_1_6_2","doi-asserted-by":"publisher","DOI":"10.1145\/358438.349320"},{"key":"e_1_3_1_7_2","doi-asserted-by":"publisher","DOI":"10.1145\/349299.349320"},{"key":"e_1_3_1_8_2","doi-asserted-by":"publisher","DOI":"10.1145\/3453483.3454030"},{"key":"e_1_3_1_9_2","doi-asserted-by":"publisher","DOI":"10.1145\/2813885.2737965"},{"key":"e_1_3_1_10_2","doi-asserted-by":"crossref","unstructured":"Mendis C. and Amarasinghe S. Goslp: Globally optimized superword level parallelism framework. In\u00a0Proceedings of the Conf. on Object-Oriented Programming Systems Languages and Applications\u00a02 (Oct. 2018).","DOI":"10.1145\/3276480"},{"key":"e_1_3_1_11_2","doi-asserted-by":"crossref","unstructured":"Nandi C. et al. Rewrite rule inference using equality saturation. In\u00a0Proceedings of the ACM on Programming Languages\u00a05\u00a0(Oct. 2021).","DOI":"10.1145\/3485496"},{"key":"e_1_3_1_12_2","doi-asserted-by":"publisher","DOI":"10.5555\/909447"},{"key":"e_1_3_1_13_2","first-page":"166:1","article-title":"Verifying and improving Halide\u2019s term rewriting system with program synthesis","volume":"4","author":"Newcomb J.L.","year":"2020","unstructured":"Newcomb, J.L. et al. Verifying and improving Halide\u2019s term rewriting system with program synthesis. In\u00a0Proceedings of the Conf. on Object-Oriented Programming, Systems, Languages, and Application.\u00a04, (2020), 166:1\u2013166:28.","journal-title":"Proceedings of the Conf. on Object-Oriented Programming, Systems, Languages, and Application."},{"key":"e_1_3_1_14_2","doi-asserted-by":"crossref","unstructured":"N\u00f6tzli A. et al. Syntax-guided rewrite rule enumeration for SMT solvers. In Proceedings of the 22nd Intern. Conf on Theory and Applications of Satisfiability Testing\u2013Vol. 11628 of Lecture Notes in Computer Science\u00a0(2019) 279\u2013297.","DOI":"10.1007\/978-3-030-24258-9_20"},{"key":"e_1_3_1_15_2","doi-asserted-by":"publisher","DOI":"10.1145\/1133981.1133997"},{"key":"e_1_3_1_16_2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2004.840306"},{"key":"e_1_3_1_17_2","doi-asserted-by":"crossref","unstructured":"Ragan-Kelley J. et al. Halide: A language and compiler for optimizing parallelism locality and recomputation in image processing pipelines. In Proceedings of the ACM SIGPLAN Conf. on Programming Language Design and Implementation (June 2013) 519\u2013530.","DOI":"10.1145\/2491956.2462176"},{"key":"e_1_3_1_18_2","unstructured":"Sasnauskas R. et al. Souper: A synthesizing superoptimizer. CoRR abs\/1711.04422 (2017)."},{"key":"e_1_3_1_19_2","doi-asserted-by":"crossref","unstructured":"Schkufza E. Sharma R. and Aiken A. Stochastic superoptimization. In Proceedings of the 18th Intern. Conf. on Architectural Support for Programming Languages and Operating Systems Association for Computing Machinery\u00a0(2013) 305\u2013316.","DOI":"10.1145\/2451116.2451150"},{"key":"e_1_3_1_20_2","doi-asserted-by":"crossref","unstructured":"Singh R. and Solar-Lezama A. SWAPPER: A framework for automatic generation of formula simplifiers based on conditional rewrite rules. In Proceedings of the 2016 Conf. on Formal Methods in Computer-Aided Design \u00a0R. Piskac and M. Talupur eds. (Oct.\u00a02016) 185\u2013192.","DOI":"10.1109\/FMCAD.2016.7886678"},{"key":"e_1_3_1_21_2","doi-asserted-by":"crossref","unstructured":"Spampinato D.G. Fabregat-Traver D. Bientinesi P. and P\u00fcschel M.\u00a0Program generation for small-scale linear algebra applications. In Proceedings of the 2018 Intern. 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In\u00a0Proceedings of the Symp. on Principles of Programming Languages\u00a05\u00a0(Jan. 2021).","journal-title":"Proceedings of the Symp. on Principles of Programming Languages"}],"container-title":["Communications of the ACM"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/dl.acm.org\/doi\/pdf\/10.1145\/3802600","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,28]],"date-time":"2026-05-28T13:56:47Z","timestamp":1779976607000},"score":1,"resource":{"primary":{"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/dl.acm.org\/doi\/10.1145\/3802600"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5,28]]},"references-count":26,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2026,6,1]]}},"alternative-id":["10.1145\/3802600"],"URL":"https:\/\/2.zoppoz.workers.dev:443\/https\/doi.org\/10.1145\/3802600","relation":{},"ISSN":["0001-0782","1557-7317"],"issn-type":[{"value":"0001-0782","type":"print"},{"value":"1557-7317","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,5,28]]},"assertion":[{"value":"2026-05-28","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}