BibTeX records: Ankit Wagle

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@article{DBLP:journals/tcad/WagleSKV24,
  author       = {Ankit Wagle and
                  Gian Singh and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {An {ASIC} Accelerator for {QNN} With Variable Precision and Tunable
                  Energy Efficiency},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {43},
  number       = {7},
  pages        = {2057--2070},
  year         = {2024},
  url          = {https://doi.org/10.1109/TCAD.2024.3357597},
  doi          = {10.1109/TCAD.2024.3357597},
  timestamp    = {Fri, 19 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/WagleSKV24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/WagleYKV23,
  author       = {Ankit Wagle and
                  Jinghua Yang and
                  Niranjan Kulkarni and
                  Sarma B. K. Vrudhula},
  title        = {A New Approach to Clock Skewing for Area and Power Optimization of
                  ASICs Using Differential Flipflops and Local Clocking},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {42},
  number       = {11},
  pages        = {4164--4176},
  year         = {2023},
  url          = {https://doi.org/10.1109/TCAD.2023.3264798},
  doi          = {10.1109/TCAD.2023.3264798},
  timestamp    = {Thu, 09 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcad/WagleYKV23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/WagleV22,
  author       = {Ankit Wagle and
                  Sarma B. K. Vrudhula},
  title        = {Heterogeneous {FPGA} Architecture Using Threshold Logic Gates for
                  Improved Area, Power, and Performance},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {41},
  number       = {6},
  pages        = {1855--1867},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCAD.2021.3099780},
  doi          = {10.1109/TCAD.2021.3099780},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/WagleV22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcasI/WagleSKV22,
  author       = {Ankit Wagle and
                  Gian Singh and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {A Novel {ASIC} Design Flow Using Weight-Tunable Binary Neurons as
                  Standard Cells},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {69},
  number       = {7},
  pages        = {2968--2981},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCSI.2022.3164995},
  doi          = {10.1109/TCSI.2022.3164995},
  timestamp    = {Mon, 25 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcasI/WagleSKV22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/DubeWSV22,
  author       = {Ayushi Dube and
                  Ankit Wagle and
                  Gian Singh and
                  Sarma B. K. Vrudhula},
  editor       = {Tulika Mitra and
                  Evangeline F. Y. Young and
                  Jinjun Xiong},
  title        = {Tunable Precision Control for Approximate Image Filtering in an In-Memory
                  Architecture with Embedded Neurons},
  booktitle    = {Proceedings of the 41st {IEEE/ACM} International Conference on Computer-Aided
                  Design, {ICCAD} 2022, San Diego, California, USA, 30 October 2022
                  - 3 November 2022},
  pages        = {151:1--151:9},
  publisher    = {{ACM}},
  year         = {2022},
  url          = {https://doi.org/10.1145/3508352.3549385},
  doi          = {10.1145/3508352.3549385},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/DubeWSV22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2204-08070,
  author       = {Ankit Wagle and
                  Gian Singh and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {A Novel {ASIC} Design Flow using Weight-Tunable Binary Neurons as
                  Standard Cells},
  journal      = {CoRR},
  volume       = {abs/2204.08070},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2204.08070},
  doi          = {10.48550/ARXIV.2204.08070},
  eprinttype   = {arXiv},
  eprint       = {2204.08070},
  timestamp    = {Tue, 19 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2204-08070.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/SinghWVK21,
  author       = {Gian Singh and
                  Ankit Wagle and
                  Sarma B. K. Vrudhula and
                  Sunil P. Khatri},
  title        = {{CIDAN:} Computing in {DRAM} with Artificial Neurons},
  booktitle    = {39th {IEEE} International Conference on Computer Design, {ICCD} 2021,
                  Storrs, CT, USA, October 24-27, 2021},
  pages        = {349--356},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ICCD53106.2021.00062},
  doi          = {10.1109/ICCD53106.2021.00062},
  timestamp    = {Tue, 28 Dec 2021 14:09:48 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/SinghWVK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2104-01699,
  author       = {Ankit Wagle and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {A Configurable {BNN} {ASIC} using a Network of Programmable Threshold
                  Logic Standard Cells},
  journal      = {CoRR},
  volume       = {abs/2104.01699},
  year         = {2021},
  url          = {https://arxiv.org/abs/2104.01699},
  eprinttype   = {arXiv},
  eprint       = {2104.01699},
  timestamp    = {Fri, 13 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2104-01699.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2112-00117,
  author       = {Gian Singh and
                  Ankit Wagle and
                  Sarma B. K. Vrudhula and
                  Sunil P. Khatri},
  title        = {{CIDAN:} Computing in {DRAM} with Artificial Neurons},
  journal      = {CoRR},
  volume       = {abs/2112.00117},
  year         = {2021},
  url          = {https://arxiv.org/abs/2112.00117},
  eprinttype   = {arXiv},
  eprint       = {2112.00117},
  timestamp    = {Tue, 07 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2112-00117.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/WagleKV20,
  author       = {Ankit Wagle and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {A Configurable {BNN} {ASIC} using a Network of Programmable Threshold
                  Logic Standard Cells},
  booktitle    = {38th {IEEE} International Conference on Computer Design, {ICCD} 2020,
                  Hartford, CT, USA, October 18-21, 2020},
  pages        = {433--440},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ICCD50377.2020.00079},
  doi          = {10.1109/ICCD50377.2020.00079},
  timestamp    = {Fri, 13 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccd/WagleKV20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/AzariWKV20,
  author       = {Elham Azari and
                  Ankit Wagle and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {A Statistical Methodology for Post-Fabrication Weight Tuning in a
                  Binary Perceptron},
  booktitle    = {21st International Symposium on Quality Electronic Design, {ISQED}
                  2020, Santa Clara, CA, USA, March 25-26, 2020},
  pages        = {141--148},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISQED48828.2020.9136979},
  doi          = {10.1109/ISQED48828.2020.9136979},
  timestamp    = {Fri, 13 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/AzariWKV20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/WagleAV19,
  author       = {Ankit Wagle and
                  Elham Azari and
                  Sarma B. K. Vrudhula},
  editor       = {David Z. Pan},
  title        = {Embedding Binary Perceptrons in {FPGA} to improve Area, Power and
                  Performance},
  booktitle    = {Proceedings of the International Conference on Computer-Aided Design,
                  {ICCAD} 2019, Westminster, CO, USA, November 4-7, 2019},
  pages        = {1--8},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ICCAD45719.2019.8942071},
  doi          = {10.1109/ICCAD45719.2019.8942071},
  timestamp    = {Wed, 19 Feb 2020 16:38:01 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/WagleAV19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/WagleSYKV19,
  author       = {Ankit Wagle and
                  Gian Singh and
                  Jinghua Yang and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {Threshold Logic in a Flash},
  booktitle    = {37th {IEEE} International Conference on Computer Design, {ICCD} 2019,
                  Abu Dhabi, United Arab Emirates, November 17-20, 2019},
  pages        = {550--558},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ICCD46524.2019.00081},
  doi          = {10.1109/ICCD46524.2019.00081},
  timestamp    = {Fri, 13 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccd/WagleSYKV19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1910-04910,
  author       = {Ankit Wagle and
                  Gian Singh and
                  Jinghua Yang and
                  Sunil P. Khatri and
                  Sarma B. K. Vrudhula},
  title        = {Threshold Logic in a Flash},
  journal      = {CoRR},
  volume       = {abs/1910.04910},
  year         = {2019},
  url          = {http://arxiv.org/abs/1910.04910},
  eprinttype   = {arXiv},
  eprint       = {1910.04910},
  timestamp    = {Fri, 13 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1910-04910.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpl/WagleYDV18,
  author       = {Ankit Wagle and
                  Jinghua Yang and
                  Aykut Dengi and
                  Sarma B. K. Vrudhula},
  title        = {FPGAs with Reconfigurable Threshold Logic Gates for Improved Performance,
                  Power and Area},
  booktitle    = {28th International Conference on Field Programmable Logic and Applications,
                  {FPL} 2018, Dublin, Ireland, August 27-31, 2018},
  pages        = {256--259},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/FPL.2018.00051},
  doi          = {10.1109/FPL.2018.00051},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpl/WagleYDV18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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