<?xml version="1.0"?>
<dblpperson name="Pallab K. Chatterjee" pid="86/608" n="11">
<person key="homepages/86/608" mdate="2009-06-09">
<author pid="86/608">Pallab K. Chatterjee</author>
</person>
<r><inproceedings key="conf/isqed/SalehCPDSS07" mdate="2023-03-23">
<author pid="s/ResveASaleh">Resve A. Saleh</author>
<author pid="86/608">Pallab K. Chatterjee</author>
<author pid="17/476">Ivan Pesic</author>
<author pid="70/3704">Robbert Dobkins</author>
<author pid="90/4387">Mike Smayling</author>
<author pid="89/716">Joseph Sawicki</author>
<title>DFM-EDA's Salvation or its Excuse for Being out of Touch with Engineering?</title>
<pages>7-8</pages>
<year>2007</year>
<crossref>conf/isqed/2007</crossref>
<booktitle>ISQED</booktitle>
<ee>https://doi.org/10.1109/ISQED.2007.62</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISQED.2007.62</ee>
<url>db/conf/isqed/isqed2007.html#SalehCPDSS07</url>
</inproceedings>
</r>
<r><inproceedings key="conf/isqed/SantariniC06" mdate="2023-03-23">
<author pid="07/1297">Michael Santarini</author>
<author pid="86/608">Pallab K. Chatterjee</author>
<title>Session EP1: Power Management and Optimization Challenges for Sub 90nm CMOS Designs- What is the Real Cost of Long Battery Life?.</title>
<pages>7</pages>
<year>2006</year>
<crossref>conf/isqed/2006</crossref>
<booktitle>ISQED</booktitle>
<ee>https://doi.org/10.1109/ISQED.2006.114</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISQED.2006.114</ee>
<url>db/conf/isqed/isqed2006.html#SantariniC06</url>
</inproceedings>
</r>
<r><inproceedings key="conf/isqed/Chatterjee05" mdate="2023-03-23">
<author pid="86/608">Pallab K. Chatterjee</author>
<title>IP Creation and Use What Roadblocks are Ahead or it is Just Clear and Bumpy Road?</title>
<pages>7-9</pages>
<year>2005</year>
<crossref>conf/isqed/2005</crossref>
<booktitle>ISQED</booktitle>
<ee>https://doi.org/10.1109/ISQED.2005.68</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISQED.2005.68</ee>
<url>db/conf/isqed/isqed2005.html#Chatterjee05</url>
</inproceedings>
</r>
<r><inproceedings key="conf/isqed/ManiwaC04" mdate="2023-03-23">
<author pid="24/3536">Tets Maniwa</author>
<author pid="86/608">Pallab K. Chatterjee</author>
<title>Evening Panel Discussion: DFM PDK's: Where Do They Belong To? Are Process Design Kits (PDKs) the Answer for Modern Design for Manufacturing (DFM) Issues?</title>
<pages>11-13</pages>
<year>2004</year>
<crossref>conf/isqed/2004</crossref>
<booktitle>ISQED</booktitle>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISQED.2004.10009</ee>
<url>db/conf/isqed/isqed2004.html#ManiwaC04</url>
</inproceedings>
</r>
<r><inproceedings key="conf/isqed/ChatterjeeG02" mdate="2023-03-23">
<author pid="86/608">Pallab K. Chatterjee</author>
<author pid="07/1683">Richard Goering</author>
<title>Evening Panel Discussion: Are the Interoperability Standards for EDA Too Little/Too Late for Real SoC Designs?</title>
<pages>15</pages>
<year>2002</year>
<crossref>conf/isqed/2002</crossref>
<booktitle>ISQED</booktitle>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISQED.2002.10012</ee>
<url>db/conf/isqed/isqed2002.html#ChatterjeeG02</url>
</inproceedings>
</r>
<r><article key="journals/pieee/ChatterjeeD98" mdate="2022-02-28">
<author pid="86/608">Pallab K. Chatterjee</author>
<author pid="314/5029">Robert Doering</author>
<title>The future of microelectronics.</title>
<pages>176-183</pages>
<year>1998</year>
<volume>86</volume>
<journal>Proc. IEEE</journal>
<number>1</number>
<ee>https://doi.org/10.1109/5.658769</ee>
<url>db/journals/pieee/pieee86.html#ChatterjeeD98</url>
</article>
</r>
<r><inproceedings key="conf/vlsid/Chatterjee98" mdate="2023-03-24">
<author pid="86/608">Pallab K. Chatterjee</author>
<title>Keynote Address: The Networked Society - Enabled by DSP Solutions.</title>
<pages>298-</pages>
<year>1998</year>
<crossref>conf/vlsid/1998</crossref>
<booktitle>VLSI Design</booktitle>
<url>db/conf/vlsid/vlsid1998.html#Chatterjee98</url>
<ee>https://doi.ieeecomputersociety.org/10.1109/VLSID.1998.10002</ee>
</inproceedings>
</r>
<r><inproceedings key="conf/vlsid/Chatterjee94" mdate="2015-04-20">
<author pid="86/608">Pallab K. Chatterjee</author>
<title>Gigachip Technology and the Signal Processing Revolution.</title>
<pages>4</pages>
<year>1994</year>
<crossref>conf/vlsid/1994</crossref>
<booktitle>VLSI Design</booktitle>
<url>db/conf/vlsid/vlsid1994.html#Chatterjee94</url>
</inproceedings>
</r>
<r><article key="journals/tvlsi/ChatterjeeL93" mdate="2020-03-11">
<author pid="86/608">Pallab K. Chatterjee</author>
<author pid="80/80">G. B. Larrabee</author>
<title>Gigabit age microelectronics and their manufacture.</title>
<pages>7-21</pages>
<year>1993</year>
<volume>1</volume>
<journal>IEEE Trans. Very Large Scale Integr. Syst.</journal>
<number>1</number>
<ee>https://doi.org/10.1109/92.219903</ee>
<url>db/journals/tvlsi/tvlsi1.html#ChatterjeeL93</url>
</article>
</r>
<r><article key="journals/tcad/YangHCMC86" mdate="2020-09-24">
<author pid="86/2711-1">Ping Yang 0001</author>
<author pid="10/4522">Dale E. Hocevar</author>
<author pid="47/6869">Paul F. Cox</author>
<author pid="52/2379">Charles F. Machala III</author>
<author pid="86/608">Pallab K. Chatterjee</author>
<title>An Integrated and Efficient Approach for MOS VLSI Statistical Circuit Design.</title>
<pages>5-14</pages>
<year>1986</year>
<volume>5</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>1</number>
<ee>https://doi.org/10.1109/TCAD.1986.1270172</ee>
<url>db/journals/tcad/tcad5.html#YangHCMC86</url>
</article>
</r>
<r><article key="journals/tcad/YangC82" mdate="2020-09-24">
<author pid="86/2711-1">Ping Yang 0001</author>
<author pid="86/608">Pallab K. Chatterjee</author>
<title>SPICE Modeling for Small Geometry MOSFET Circuits.</title>
<pages>169-182</pages>
<year>1982</year>
<volume>1</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>4</number>
<ee>https://doi.org/10.1109/TCAD.1982.1270008</ee>
<url>db/journals/tcad/tcad1.html#YangC82</url>
</article>
</r>
<coauthors n="14" nc="2">
<co c="1"><na f="c/Cox:Paul_F=" pid="47/6869">Paul F. Cox</na></co>
<co c="0"><na f="d/Dobkins:Robbert" pid="70/3704">Robbert Dobkins</na></co>
<co c="-1"><na f="d/Doering:Robert" pid="314/5029">Robert Doering</na></co>
<co c="0"><na f="g/Goering:Richard" pid="07/1683">Richard Goering</na></co>
<co c="1"><na f="h/Hocevar:Dale_E=" pid="10/4522">Dale E. Hocevar</na></co>
<co c="-1"><na f="l/Larrabee:G=_B=" pid="80/80">G. B. Larrabee</na></co>
<co c="1"><na f="m/Machala_III:Charles_F=" pid="52/2379">Charles F. Machala III</na></co>
<co c="-1"><na f="m/Maniwa:Tets" pid="24/3536">Tets Maniwa</na></co>
<co c="0"><na f="p/Pesic:Ivan" pid="17/476">Ivan Pesic</na></co>
<co c="0" n="2"><na f="s/Saleh:Res" pid="s/ResveASaleh">Res Saleh</na><na>Resve A. Saleh</na></co>
<co c="-1"><na f="s/Santarini:Michael" pid="07/1297">Michael Santarini</na></co>
<co c="0"><na f="s/Sawicki:Joseph" pid="89/716">Joseph Sawicki</na></co>
<co c="0"><na f="s/Smayling:Mike" pid="90/4387">Mike Smayling</na></co>
<co c="1"><na f="y/Yang_0001:Ping" pid="86/2711-1">Ping Yang 0001</na></co>
</coauthors>
</dblpperson>

