<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<article key="journals/tvlsi/LiFMYZX25" mdate="2025-09-14">
<author orcid="0009-0006-9499-7746">Kun Li 0032</author>
<author orcid="0000-0001-7440-4751">Hongji Fang</author>
<author orcid="0000-0002-7283-2637">Zhenguo Ma</author>
<author orcid="0000-0002-9740-2537">Feng Yu 0003</author>
<author orcid="0000-0001-6565-4388">Bo Zhang 0097</author>
<author orcid="0000-0002-5671-6118">Qianjian Xing</author>
<title>Area-Efficient Pipeline Architecture for Serial Real-Valued Fast Fourier Transform.</title>
<pages>1427-1431</pages>
<year>2025</year>
<month>May</month>
<volume>33</volume>
<journal>IEEE Trans. Very Large Scale Integr. Syst.</journal>
<number>5</number>
<ee>https://doi.org/10.1109/TVLSI.2024.3496922</ee>
<url>db/journals/tvlsi/tvlsi33.html#LiFMYZX25</url>
<stream>streams/journals/tvlsi</stream>
</article>
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