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26th Hot Chips Symposium 2014: Cupertino, CA, USA
- 2014 IEEE Hot Chips 26 Symposium (HCS), Cupertino, CA, USA, August 10-12, 2014. IEEE 2014, ISBN 978-1-4673-8883-2

- Yogesh K. Ramadass:

Powering the internet of things. 1-50 - Samuel Naffziger, Guri Sohi:

Welcome program chairs. 1-2 - Tomasz Szydzik, David Moloney:

Precision refinement for media-processor SoCs: fp32 -> fp64 on myriad. 1 - Jian Ouyang, Shiding Lin, Wei Qi, Yong Wang, Bo Yu, Song Jiang:

SDA: Software-defined accelerator for large-scale DNN systems. 1-23 - Chung-Hsun Huang, Wei-Jen Chen, Keng-Jui Chang, Yi-Hsuan Ting, Keng-Chang Hsu, Yu-Fu Pan, Chao-Chun Chen, Yuan-Hua Chu, Tay-Jyi Lin, Jinn-Shyan Wang:

Low power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET). 1 - David Durham

:
Mitigating exploits, rootkits and advanced persistent threats. 1-39 - Dan Bouvier, Ben Sander:

Applying AMD's Kaveri APU for heterogeneous computing. 1-42 - Joonyoung Kim, Younsu Kim:

HBM: Memory solution for bandwidth-hungry processors. 1-24 - Gagan Gupta:

Have your cake in parallel and eat it sequentially too! Semantically sequential, parallel execution of multiprocessor programs. 1 - Tomasz Szydzik, Marius Farcas, Valeriu Ohan, David Moloney:

Level-3 BLAS on myriad multi-core media-processor SoC. 1 - Ruby B. Lee:

University research in hardware security. 1-27 - Ruby B. Lee, Vikas Chandra, Leendert van Doorn, David Durham

:
HotChips security tutorial. 1-5 - Shintaro Momose:

SX-ACE processor: NEC's brand-new vector processor. 1-27 - Vikas Chandra, Rob Aitken:

Mobile hardware security. 1-40 - Toshio Yoshida:

SPARC64™ XIfx: Fujitsu's next generation processor for HPC. 1-31 - Ram Sivaramakrishnan, Sumti Jairath:

Next generation SPARC processor cache hierarchy. 1-28 - Darrell Boggs, Gary Brown, Bill Rozas, Nathan Tuck, K. S. Venkatraman:

Hot Chips 2014 Nvidia's denver processor. 1-25 - Mike Filippo, David Sonnier:

ARM next-generation IP supporting Avago high-end networking. 1-21 - Massimo Alioto:

Ultra-low power design approaches for IoT. 1-57 - Leendert van Doorn:

Secure systems design. 1-31 - Bradley Burres, Johan van de Groenendaal, Jonathan Robinson, Ian M. Steiner:

Intel C2000 atom microserver power efficient processing for the data center. 1-25 - Michael Gschwind:

OpenPOWER: Reengineering a server ecosystem for large-scale data centers. 1-28 - Stephen Phillips:

M7: Next generation SPARC. 1-27 - Woo-Chan Park, Hee-Jin Shin, Byoungok Lee, Hyung-Min Yoon, Tack-Don Han:

RayChip®: Real-time ray-tracing chip for embedded applications. 1-32 - Jaikrishnan Menon, Lorenzo De Carli, Vijayraghavan Thiruvengadam, Karthikeyan Sankaralingam, Cristian Estan:

Memory processing units. 1 - Vito Giovanni Castellana, Antonino Tumeo

, Fabrizio Ferrandi
:
High-level synthesis of memory bound and irregular parallel applications with Bambu. 1 - Javed Barkatullah, Timo Hanke, Ravi Iyengar, Ricky Lewelling, Jim O'Connor:

Goldstrike 1: Cointerra's first generation crypto-currency processor for bitcoin mining machines. 1-16 - Chia-Hsin Owen Chen, Sunghyun Park, Suvinay Subramanian

, Tushar Krishna, Bhavya K. Daya, Woo-Cheol Kwon, Brett Wilkerson, John Arends, Anantha P. Chandrakasan, Li-Shiuan Peh:
SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect. 1-20 - Michael Ditty, John Montrym, Craig M. Wittenbrink:

NVIDIA'S Tegra K1 system-on-chip. 1-26 - Mike Muller:

Power constraints: From sensors to servers. 1-37 - Rob Chandhok:

The internet of everything. 1-29 - Steve Young, Dinesh Gaitonde:

High capacity and high performance 20nm FPGAs. 1-21 - Mike Stauffer:

Connecting the internet of everything. 1-38 - Arjang Hassibi:

CMOS biochips for point-of-care molecular diagnostics. 1-32 - Shiro Kamohara, Nobuyuki Sugii

, Koichiro Ishibashi, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham
:
A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. 1 - Ruby B. Lee:

Security basics. 1-32 - Alex E. Mericas:

Performance characteristics of the POWER8 processor. 1-26 - Gaurav Singh, Greg Favor, Alfred Yeung:

AppliedMicro X-Gene2. 1-24 - David Moloney, Brendan Barry, Richard Richmond, Fergal Connor, Cormac Brick, David Donohoe:

Myriad 2: Eye of the computational vision storm. 1-18 - Raphael Polig, Kubilay Atasu

, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee:
Hardware-accelerated text analytics. 1-24 - Takashi Yoshikawa, Jun Suzuki, Yoichi Hidaka, Junichi Higuchi, Shinji Abe:

Bridge chip composing a PCIe switch over ethernet to make a seamless disaggregated computer in data-center scale. 1 - Brad Vest, Sean Atsatt, Mike Hutton:

Design of a high-density SoC FPGA at 20nm. 1-24 - Irma Esmer Papazian, Sailesh Kottapalli:

Ivybridge server architecture: A converged server. 1-29

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