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ORCIDMicroelectronics Journal, Volume 52
Volume 52, June 2016
- Carlos A. M. Costa Júnior, José B. Sales Filho
, Gabriel C. L. Cunha, Diomadson R. Belfort, Sebastian Yuri Cavalcanti Catunda, Robson Nunes de Lima, Vincent P. M. Bourguet:
A 70.4 dB voltage gain, 2.3 dB NF, fully integrated multi-standard UHF receiver front-end in CMOS 130-nm. 1-10 - Nikhil Raj, Ashutosh Kumar Singh, Anil Kumar Gupta:
High performance current mirrors using quasi-floating bulk. 11-22 - Wei Guo, Shubin Liu, Zhangming Zhu:
An asynchronous 12-bit 50 MS/s rail-to-rail Pipeline-SAR ADC in 0.18 μm CMOS. 23-30 - Yintang Yang, Zuo-Chen Shi, Di Li, Yu Wang:
Design of a fully integrated receiver analog baseband chain for 2.4-GHz ZigBee applications. 31-39 - Piotr Zajac, Melvin Galicia, Cezary Maj, Andrzej Napieralski:
Impact of floorplanning and thermal vias placement on temperature in 2D and 3D processors. 40-48 - Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
High-speed hardware architecture of scalar multiplication for binary elliptic curve cryptosystems. 49-65 - Rupendra Kumar Sharma, Charalambos A. Dimitriadis, Matthias Bucher:
A comprehensive analysis of nanoscale single- and multi-gate MOSFETs. 66-72 - MunEm Hossain, Masud H. Chowdhury:
Comprehensive doping scheme for MOSFETs in ultra-low-power subthreshold circuits design. 73-79 - Iffa Sharuddin, Lini Lee, Zubaida Binti Yusoff:
Analysis design of area efficient segmentation digital to analog converter for ultra-low power successive approximation analog to digital converter. 80-90 - Saha Mousumi, Mamata Dalui, Biplab K. Sikdar:
A cellular automata based highly accurate memory test hardware realizing March C-. 91-103 - Xiaochao Li, Liangxi Zhou, Yihui Chen, Ying Zhang, Chunhui Cao, Donghui Guo:
A curvature-compensated CMOS bandgap with negative feedback technique. 104-110 - Faycal Amrani, Mohamed Trabelsi, Rachida Youhami, Rabia Aksas:
New design method of the single stage distributed amplifier. 111-116 - Jie Xiao, William Lee, Jianhui Jiang, Xuhua Yang:
Circuit reliability estimation based on an iterative PTM model with hybrid coding. 117-123 - Nikhil Raj, Ashutosh Kumar Singh, Anil Kumar Gupta:
Low voltage high performance bulk driven quasi-floating gate based self-biased cascode current mirror. 124-133 - Manas Kumar Hati, Tarun Kanti Bhattacharyya:
A fast automatic frequency and amplitude control LC-VCO circuit with noise filtering technique for a fractional-N PLL frequency synthesizer. 134-146 - Sherif M. Sharroush:
Performance optimization of 1T-1C DRAMs: A quantitative study. 147-164
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