99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation system.

Shen-Yu Peng Yen-Ting Lin Shin-Chi Lai Shin-Hao Chen Shen-Yu Peng Ke-Horng Chen Sheng Kang Kevin Cheng 0002 Ying-Hsi Lin Chen-Chih Huang Chao-Cheng Lee 99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation system. 1-4 2015 A-SSCC https://doi.org/10.1109/ASSCC.2015.7387500 conf/asscc/2015 db/conf/asscc/asscc2015.html#LinLCPCKCLHL15 Yi-Ping Su Chiun-He Lin Shen-Yu Peng Ru-Yu Huang Te-Fu Yang Shin-Hao Chen Ting-Jung Lo Ke-Horng Chen Chin-Long Wey Ying-Hsi Lin Chao-Cheng Lee Jian-Ru Lin Tsung-Yen Tsai 12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive control. 1-3 2015 ISSCC https://doi.org/10.1109/ISSCC.2015.7063007 conf/isscc/2015 db/conf/isscc/isscc2015.html#SuLPHYCLCWLLLT15 Shin-Hao Chen Shen-Yu Peng Ke-Horng Chen Shin-Chi Lai Sheng Kang Kevin Cheng 0002 Ying-Hsi Lin Chen-Chih Huang Chao-Cheng Lee A 2.5W tablet speaker delivering 3.2W pseudo high power by psychoacoustic model based adaptive power management system. 221-224 2014 A-SSCC https://doi.org/10.1109/ASSCC.2014.7008900 conf/asscc/2014 db/conf/asscc/asscc2014.html#ChenPCLKCLHL14

Yu-Huei Lee Shen-Yu Peng Chao-Chang Chiu Alex Chun-Hsien Wu Ke-Horng Chen Ying-Hsi Lin Shih-Wei Wang Tsung-Yen Tsai Chen-Chih Huang Chao-Cheng Lee A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. 1018-1030 2013 48 IEEE J. Solid State Circuits 4 https://doi.org/10.1109/JSSC.2013.2237991 db/journals/jssc/jssc48.html#LeePCWCLWTHL13

Shen-Yu Peng Tzu-Chi Huang Yu-Huei Lee Chao-Chang Chiu Ke-Horng Chen Ying-Hsi Lin Chao-Cheng Lee Tsung-Yen Tsai Chen-Chih Huang Long-Der Chen Cheng-Chen Yang Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. 2649-2661 2013 48 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/JSSC.2013.2274885 db/journals/jssc/jssc48.html#PengHLCCLLTHCY13

Yu-Huei Lee Chao-Chang Chiu Shen-Yu Peng Ke-Horng Chen Ying-Hsi Lin Chao-Cheng Lee Chen-Chih Huang Tsung-Yen Tsai A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. 2563-2575 2012 47 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/JSSC.2012.2211671 db/journals/jssc/jssc47.html#LeeCPCLLHT12

Yu-Huei Lee Shen-Yu Peng Alex Chun-Hsien Wu Chao-Chang Chiu Yao-Yi Yang Ming-Hsin Huang Ke-Horng Chen Ying-Hsi Lin Shih-Wei Wang Ching-Yuan Yeh Chen-Chih Huang Chao-Cheng Lee A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. 178-179 2012 VLSIC https://doi.org/10.1109/VLSIC.2012.6243848 conf/vlsic/2012 db/conf/vlsic/vlsic2012.html#LeePWCYHCLWYHL12 Ke-Horng Chen Long-Der Chen Shin-Hao Chen Kevin Cheng 0002 Chao-Chang Chiu Chen-Chih Huang Ming-Hsin Huang Ru-Yu Huang Tzu-Chi Huang Sheng Kang Shin-Chi Lai Chao-Cheng Lee Yu-Huei Lee Chiun-He Lin Jian-Ru Lin Yen-Ting Lin Ying-Hsi Lin Ting-Jung Lo Yi-Ping Su Tsung-Yen Tsai Shih-Wei Wang Chin-Long Wey Alex Chun-Hsien Wu Cheng-Chen Yang Te-Fu Yang Yao-Yi Yang Ching-Yuan Yeh