Reconfigurable Database Processor for Query Acceleration on FPGA.

Bo-En Chen Bo-En Chen Bo-Yen Lin Bo-Cheng Lai Reconfigurable Database Processor for Query Acceleration on FPGA. 1-4 2021 VLSI-DAT https://doi.org/10.1109/VLSI-DAT52063.2021.9427326 conf/vlsi-dat/2021 db/conf/vlsi-dat/vlsi-dat2021.html#ChenLL21

Bo-Cheng Lai Bo-Ya Chen Bo-En Chen Yi-Da Hsin REMAP+: An Efficient Banking Architecture for Multiple Writes of Algorithmic Memory. 660-671 2020 28 IEEE Trans. Very Large Scale Integr. Syst. 3 https://doi.org/10.1109/TVLSI.2019.2957455 db/journals/tvlsi/tvlsi28.html#LaiCCH20

Bo-Ya Chen Bo-En Chen Bo-Cheng Lai Efficient Write Scheme for Algorithm-Based Multi-Ported Memory. 1-4 2019 VLSI-DAT https://doi.org/10.1109/VLSI-DAT.2019.8741927 conf/vlsi-dat/2019 db/conf/vlsi-dat/vlsi-dat2019.html#ChenCL19

Whai-En Chen Bo-En Chen An Effective NAT Traversal Mechanism for SIP/IMS Services in SDN-Enabled All-IP Mobile Networks. 2171-2185 2015 84 Wirel. Pers. Commun. 3 https://doi.org/10.1007/s11277-015-2549-1 db/journals/wpc/wpc84.html#ChenC15

Whai En Chen Bo-En Chen An Effective NAT Traversal Mechanism for IMS Applications in 3GPP Networks. 889-892 2014 IIH-MSP https://doi.org/10.1109/IIH-MSP.2014.224 conf/iih-msp/2014 db/conf/iih-msp/iih-msp2014.html#ChenC14 Bo-Ya Chen Whai En Chen Whai-En Chen Yi-Da Hsin Bo-Cheng Lai Bo-Yen Lin