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2020 – today
- 2025
[j10]Zhuolun He, Yuan Pu, Haoyuan Wu, Yuhan Qiu, Tairu Qiu, Bei Yu:
Large Language Models for EDA: From Assistants to Agents. Found. Trends Electron. Des. Autom. 14(4): 295-314 (2025)- [j9]Ziyi Wang
, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Yu Huang, Bei Yu:
FGNN2: A Powerful Pretraining Framework for Learning the Logic Functionality of Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(1): 227-240 (2025) - [j8]Yuan Pu, Tinghuan Chen, Zhuolun He, Jiajun Qin, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu:
IncreMacro: Incremental Macro Placement Refinement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(8): 3222-3235 (2025) - [j7]Yuan Pu, Zhuolun He, Yuqi Jiang, Tairu Qiu, Haoyuan Wu, Qi Sun, Cheng Zhuo, Bei Yu:
Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(12): 4615-4628 (2025) - [j6]Jiahao Xu, Zhuolun He, Shuo Yin, Yuan Pu, Wenjian Yu, Bei Yu:
EasyMRC: Efficient Mask Rule Checking via Representative Edge Sampling. ACM Trans. Design Autom. Electr. Syst. 30(3): 47:1-47:19 (2025) - [j5]Zhuolun He, Yuan Pu, Haoyuan Wu, Tairu Qiu, Bei Yu:
Large Language Models for EDA: Future or Mirage? ACM Trans. Design Autom. Electr. Syst. 30(6): 90:1-90:53 (2025) - [c31]Haoyuan Wu, Rui Ming, Haisheng Zheng, Zhuolun He, Bei Yu:
Efficient OpAmp Adaptation for Zoom Attention to Golden Contexts. ACL (1) 2025: 13319-13331 - [c30]Hang Liu, Hao Geng, Zhuolun He, Qi Sun, Cheng Zhuo:
Swift or Exact? Boosting Efficient Microarchitecture DSE via Multi-fidelity Partial Order Prediction. DAC 2025: 1-7 - [c29]Haisheng Zheng, Haoyuan Wu, Zhuolun He:
ChatLS: Multimodal Retrieval-Augmented Generation and Chain-of-Thought for Logic Synthesis Script Customization. DAC 2025: 1-7 - [c28]Haisheng Zheng, Haoyuan Wu, Zhuolun He, Yuzhe Ma, Bei Yu:
iRw: An Intelligent Rewriting. DATE 2025: 1-2 - [c27]Yuan Pu, Zhuolun He, Shutong Lin, Jiajun Qin, Xinyun Zhang, Hairuo Han, Haisheng Zheng, Yuqi Jiang, Cheng Zhuo, Qi Sun, David Z. Pan, Bei Yu:
MM-GRADE: A Multi-Modal EDA Tool Documentation QA Framework Leveraging Retrieval Augmented Generation. ICCAD 2025: 1-9 - [c26]Yuan Pu, Yuhao Ji, Siying Yu, Zuodong Zhang, Zizheng Guo, Zhuolun He, Yibo Lin, David Z. Pan, Bei Yu:
GPU Acceleration for Versatile Buffer Insertion. ICCAD 2025: 1-9 - [c25]Yuan Pu, Fangzhou Liu, Zhuolun He, Keren Zhu, Rongliang Fu, Ziyi Wang, Tsung-Yi Ho, Bei Yu:
HeLO: A Heterogeneous Logic Optimization Framework by Hierarchical Clustering and Graph Learning. ISPD 2025: 116-124 - [c24]Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu:
Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation. NAACL (Long Papers) 2025: 1710-1721 - [i10]Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu:
Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation. CoRR abs/2502.10857 (2025) - [i9]Haoyuan Wu, Rui Ming, Haisheng Zheng, Zhuolun He, Bei Yu:
Efficient OpAmp Adaptation for Zoom Attention to Golden Contexts. CoRR abs/2502.12502 (2025) - [i8]Haoyuan Wu, Haisheng Zheng, Shoubo Hu, Zhuolun He, Bei Yu:
Architect of the Bits World: Masked Autoregressive Modeling for Circuit Generation Guided by Truth Table. CoRR abs/2502.12751 (2025) - [i7]Jiajun Qin, Yuan Pu, Zhuolun He, Seunggeun Kim, David Z. Pan, Bei Yu:
UniMoCo: Unified Modality Completion for Robust Multi-Modal Embeddings. CoRR abs/2505.11815 (2025) - [i6]Haoyuan Wu, Xueyi Chen, Rui Ming, Jilong Gao, Shoubo Hu, Zhuolun He, Bei Yu:
ToTRL: Unlock LLM Tree-of-Thoughts Reasoning Potential through Puzzles Solving. CoRR abs/2505.12717 (2025) - [i5]Haoyuan Wu, Rui Ming, Jilong Gao, Hangyu Zhao, Xueyi Chen, Yikai Yang, Haisheng Zheng, Zhuolun He, Bei Yu:
On-Policy Optimization with Group Equivalent Preference for Multi-Programming Language Understanding. CoRR abs/2505.12723 (2025) - [i4]Rui Ming, Haoyuan Wu, Shoubo Hu, Zhuolun He, Bei Yu:
One-Token Rollout: Guiding Supervised Fine-Tuning of LLMs with Policy Gradient. CoRR abs/2509.26313 (2025) - 2024
- [j4]Haoyuan Wu, Zhuolun He, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng, Bei Yu:
ChatEDA: A Large Language Model Powered Autonomous Agent for EDA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3184-3197 (2024) - [c23]Haisheng Zheng, Zhuolun He, Fangzhou Liu, Zehua Pei, Bei Yu:
LSTP: A Logic Synthesis Timing Predictor. ASPDAC 2024: 728-733 - [c22]Yuan Pu, Fangzhou Liu, Yu Zhang, Zhuolun He, Yibo Lin, Kai-Yuan Chao, Bei Yu:
Lesyn: Placement-aware Logic Resynthesis for Non-Integer Multiple-Cell-Height Designs. DAC 2024: 116:1-116:6 - [c21]Jiaxi Jiang, Lancheng Zou, Wenqian Zhao, Zhuolun He, Tinghuan Chen, Bei Yu:
PDRC: Package Design Rule Checking via GPU-Accelerated Geometric Intersection Algorithms for Non-Manhattan Geometry. DAC 2024: 119:1-119:6 - [c20]Fangzhou Liu, Zehua Pei, Ziyang Yu, Haisheng Zheng, Zhuolun He, Tinghuan Chen, Bei Yu:
CBTune: Contextual Bandit Tuning for Logic Synthesis. DATE 2024: 1-6 - [c19]Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu:
Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks. EMNLP 2024: 737-749 - [c18]Yuan Pu, Zhuolun He, Tairu Qiu, Haoyuan Wu, Bei Yu:
Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QA. ICCAD 2024: 116:1-116:9 - [c17]Zhuolun He, Bei Yu:
Large Language Models for EDA: Future or Mirage? ISPD 2024: 65-66 - [c16]Siting Liu, Jiaxi Jiang, Zhuolun He, Ziyi Wang, Yibo Lin, Bei Yu, Martin D. F. Wong:
Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs. ISPD 2024: 75-82 - [c15]Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu:
IncreMacro: Incremental Macro Placement Refinement. ISPD 2024: 169-176 - [i3]Yuan Pu, Zhuolun He, Tairu Qiu, Haoyuan Wu, Bei Yu:
Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QA. CoRR abs/2407.15353 (2024) - 2023
- [j3]Ziyi Wang, Zhuolun He, Chen Bai, Haoyu Yang, Bei Yu:
Efficient Arithmetic Block Identification With Graph Learning and Network-Flow. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2591-2603 (2023) - [j2]Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie:
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3910-3924 (2023) - [c14]Yuxuan Zhao, Qi Sun, Zhuolun He, Yang Bai, Bei Yu:
AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution. AAAI 2023: 11354-11362 - [c13]Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, Bei Yu:
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration. DAC 2023: 1-6 - [c12]Wei Zhong, Zhenhua Feng, Zhuolun He, Weimin Wang, Yuzhe Ma, Bei Yu:
Efficient Design Rule Checking with GPU Acceleration. DATE 2023: 1-2 - [c11]Zhuolun He, Bei Yu:
Invited Paper: Heterogeneous Acceleration for Design Rule Checking. ICCAD 2023: 1-7 - [c10]Zehua Pei, Fangzhou Liu, Zhuolun He, Guojin Chen, Haisheng Zheng, Keren Zhu, Bei Yu:
AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search. ICCAD 2023: 1-9 - [c9]Zhuolun He, Haoyuan Wu, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng, Bei Yu:
ChatEDA: A Large Language Model Powered Autonomous Agent for EDA. MLCAD 2023: 1-6 - [i2]Zhuolun He, Haoyuan Wu, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng, Bei Yu:
ChatEDA: A Large Language Model Powered Autonomous Agent for EDA. CoRR abs/2308.10204 (2023) - 2022
- [c8]Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, Yu Huang:
Functionality matters in netlist representation learning. DAC 2022: 61-66 - [c7]Zhuolun He, Yuzhe Ma, Bei Yu:
X-Check: CPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms. ICCAD 2022: 52:1-52:9 - 2021
- [c6]Zhuolun He, Peiyu Liao, Siting Liu, Yuzhe Ma, Yibo Lin, Bei Yu:
Physical Synthesis for Advanced Neural Network Processors. ASP-DAC 2021: 833-840 - [c5]Zhuolun He, Ziyi Wang, Chen Bai, Haoyu Yang, Bei Yu:
Graph Learning-Based Arithmetic Block Identification. ICCAD 2021: 1-8 - 2020
- [j1]Ching-Yun Ko, Cong Chen, Zhuolun He, Yuke Zhang, Kim Batselier, Ngai Wong:
Deep Model Compression and Inference Speedup of Sum-Product Networks on Tensor Trains. IEEE Trans. Neural Networks Learn. Syst. 31(7): 2665-2671 (2020) - [c4]Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong:
Learn to Floorplan through Acquisition of Effective Local Search Heuristics. ICCD 2020: 324-331 - [c3]Yuzhe Ma, Zhuolun He, Wei Li, Lu Zhang, Bei Yu:
Understanding Graphs in EDA: From Shallow to Deep Learning. ISPD 2020: 119-126 - [i1]Rui Lin, Ching-Yun Ko, Zhuolun He, Cong Chen, Yuan Cheng, Hao Yu, Graziano Chesi, Ngai Wong:
HOTCAKE: Higher Order Tucker Articulated Kernels for Deeper CNN Compression. CoRR abs/2002.12663 (2020)
2010 – 2019
- 2018
- [c2]Zhuolun He, Hanxian Huang, Ming Jiang, Yuanchao Bai, Guojie Luo:
FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos. FCCM 2018: 181-188 - 2017
- [c1]Zhuolun He, Guojie Luo:
FPGA Acceleration for Computational Glass-Free Displays. FPGA 2017: 267-274
Coauthor Index
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last updated on 2026-01-10 00:39 CET by the dblp team
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