<?xml version="1.0"?>
<dblpperson name="Kuo-Hsinag Hsu" pid="203/5607" n="1">
<person key="homepages/203/5607" mdate="2017-07-26">
<author pid="203/5607">Kuo-Hsinag Hsu</author>
</person>
<r><inproceedings key="conf/isvlsi/SrinivasaMCHLCG17" mdate="2025-06-17">
<author pid="195/4175">Srivatsa Rangachar Srinivasa</author>
<author pid="24/9366">Karthik Mohan</author>
<author pid="20/7529">Wei-Hao Chen</author>
<author pid="203/5607">Kuo-Hsinag Hsu</author>
<author pid="01/6993-2">Xueqing Li 0002</author>
<author pid="89/6934">Meng-Fan Chang</author>
<author pid="97/7449">Sumeet Kumar Gupta</author>
<author pid="11/2192">John Sampson</author>
<author pid="v/NarayananVijaykrishnan">Vijaykrishnan Narayanan</author>
<title>Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.</title>
<pages>128-133</pages>
<year>2017</year>
<booktitle>ISVLSI</booktitle>
<ee>https://doi.org/10.1109/ISVLSI.2017.31</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2017.31</ee>
<crossref>conf/isvlsi/2017</crossref>
<url>db/conf/isvlsi/isvlsi2017.html#SrinivasaMCHLCG17</url>
</inproceedings>
</r>
<coauthors n="8" nc="1">
<co c="0"><na f="c/Chang:Meng=Fan" pid="89/6934">Meng-Fan Chang</na></co>
<co c="0"><na f="c/Chen:Wei=Hao" pid="20/7529">Wei-Hao Chen</na></co>
<co c="0"><na f="g/Gupta:Sumeet_Kumar" pid="97/7449">Sumeet Kumar Gupta</na></co>
<co c="0"><na f="l/Li_0002:Xueqing" pid="01/6993-2">Xueqing Li 0002</na></co>
<co c="0"><na f="m/Mohan:Karthik" pid="24/9366">Karthik Mohan</na></co>
<co c="0" n="2"><na f="s/Sampson:Jack" pid="11/2192">Jack Sampson</na><na>John Sampson</na></co>
<co c="0"><na f="s/Srinivasa:Srivatsa_Rangachar" pid="195/4175">Srivatsa Rangachar Srinivasa</na></co>
<co c="0" n="2"><na f="v/Vijaykrishnan:Narayanan" pid="v/NarayananVijaykrishnan">Narayanan Vijaykrishnan</na><na>Vijaykrishnan Narayanan</na></co>
</coauthors>
</dblpperson>

