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Hoai Luan Pham
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- affiliation: Nara Institute of Science and Technology, NAIST, Graduate School of Information Science, Japan
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2020 – today
- 2026
[j18]Thi Diem Tran
, Minh Tan Ha, Xuan Thao Tran, Ngoc Quoc Tran, Vu Trung Duong Le, Hoai Luan Pham, Van Tinh Nguyen:
An innovative HLS framework for all network architectures: From Python to SoC. Integr. 107: 102626 (2026)
[i10]Bui Ngoc Thanh Binh, Pham Hoai Luan, Vu Trung Duong Le, Vu Tuan Hai, Yasuhiko Nakashima:
A Protocol-Aware P4 Pipeline for MQTT Security and Anomaly Mitigation in Edge IoT Systems. CoRR abs/2601.07536 (2026)- 2025
[j17]Tuan Hai Vu
, Vu Trung Duong Le
, Hoai Luan Pham
, Quoc Chuong Nguyen
, Yasuhiko Nakashima
:
FQsun: A Configurable Wave Function-Based Quantum Emulator for Power-Efficient Quantum Simulations. IEEE Access 13: 93271-93286 (2025)
[j16]Doanh C. Bui
, Hoai Luan Pham
, Vu Trung Duong Le
, Tuan Hai Vu
, Van Duy Tran
, Khang Nguyen
, Yasuhiko Nakashima
:
Lifelong Whole Slide Image Analysis: Online Vision-Language Adaptation and Past-to-Present Gradient Distillation. IEEE Access 13: 107583-107595 (2025)
[j15]Van Tinh Nguyen
, Phuc Hung Pham, Vu Trung Duong Le
, Hoai Luan Pham, Tuan Hai Vu, Thi Diem Tran:
AES-RV: Hardware-efficient RISC-V accelerator with low-latency AES instruction extension for IoT security. IEICE Electron. Express 22(16): 20250329 (2025)
[j14]Hoai Luan Pham
, Vu Trung Duong Le
, Tuan Hai Vu
, Van Duy Tran
, Van Tinh Nguyen
, Thi Diem Tran
, Yasuhiko Nakashima
:
MRCA 2.0: An Area-Optimized Multigrained Reconfigurable Cryptographic Accelerator for Securing Blockchain-Based Internet of Things Systems. IEEE Micro 45(2): 78-89 (2025)
[j13]Tuan Hai Vu
, Vu Trung Duong Le
, Hoai Luan Pham
, Yasuhiko Nakashima
:
Benchmarking Variants of the Adam Optimizer for Quantum Machine Learning Applications. IEEE Open J. Comput. Soc. 6: 1146-1154 (2025)
[j12]Vu Trung Duong Le
, Hoai Luan Pham
, Thi Hong Tran, Van Duy Tran
, Tuan Hai Vu
, Yasuhiko Nakashima
:
CTFE: A High-Efficient Heterogeneous Cryptographic CGRA for Diverse Security Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(5): 1793-1806 (2025)
[j11]Hoai Luan Pham
, Thi Diem Tran
, Vu Trung Duong Le
, Yasuhiko Nakashima
:
MINA: A Hardware-Efficient and Flexible Mini-InceptionNet Accelerator for ECG Classification in Wearable Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 72(6): 2740-2753 (2025)
[c37]Van Duy Tran, Tuan Hai Vu, Vu Trung Duong Le, Hoai Luan Pham, Yasuhiko Nakashima:
HPQEA: A Scalable and High-Performance Quantum Emulator with High-Bandwidth Memory for Diverse Algorithms Support. CANDAR 2025: 106-112
[c36]Tuan Hai Vu, Doanh C. Bui, Vu Trung Duong Le, Pham Hoai Luan, Yasuhiko Nakashima:
Transfer-Based Strategies for Multi-Target Quantum Optimization. CANDARW 2025: 135-141
[c35]Hikaru Okamoto, Vu Trung Duong Le, Hoai Luan Pham, Van Tinh Nguyen, Yasuhiko Nakashima:
MMzk: 384-bit Low-Resource Montgomery Multiplier on FPGA for zk-SNARK. CANDAR 2025: 160-166
[c34]Thanh Hai To, Vu-Trung Duong Le, Van Tinh Nguyen, Van-Tuan Luu, Hoai Luan Pham, Yasuhiko Nakashima:
zk-STARKs in Action: Real-Time and Post-Quantum Verification for Banking Transactions. CANDARW 2025: 224-230
[c33]Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Van Duy Tran, Yasuhiko Nakashima:
UniCrypt: Universal Crypto Engine with Optimized Resource Sharing for Security Applications. COOL CHIPS 2025: 1-6
[i9]Vu Tuan Hai, Trinh Huynh Ho Thi Mong, Pham Hoai Luan:
A Fast Quantum Image Compression Algorithm based on Taylor Expansion. CoRR abs/2502.10684 (2025)
[i8]Doanh C. Bui, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Yasuhiko Nakashima:
ZeroSlide: Is Zero-Shot Classification Adequate for Lifelong Learning in Whole-Slide Image Analysis in the Era of Pathology Vision-Language Foundation Models? CoRR abs/2504.15627 (2025)
[i7]Doanh C. Bui, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Khang Nguyen, Yasuhiko Nakashima:
Lifelong Whole Slide Image Analysis: Online Vision-Language Adaptation and Past-to-Present Gradient Distillation. CoRR abs/2505.01984 (2025)
[i6]Vu Tuan Hai, Doanh C. Bui, Vu Trung Duong Le, Pham Hoai Luan, Yasuhiko Nakashima:
Qimax: Efficient quantum simulation via GPU-accelerated extended stabilizer formalism. CoRR abs/2505.03307 (2025)
[i5]Van Tinh Nguyen, Phuc Hung Pham, Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Thi Diem Tran:
AES-RV: Hardware-Efficient RISC-V Accelerator with Low-Latency AES Instruction Extension for IoT Security. CoRR abs/2505.11880 (2025)
[i4]Doanh C. Bui, Ba Hung Ngo, Hoai Luan Pham, Khang Nguyen, Maï K. Nguyen, Yasuhiko Nakashima:
MergeSlide: Continual Model Merging and Task-to-Class Prompt-Aligned Inference for Lifelong Learning on Whole Slide Images. CoRR abs/2511.13099 (2025)- 2024
[j10]Vu Trung Duong Le, Hoai-Luan Pham
, Thi Hong Tran, Yasuhiko Nakashima:
Flexible and Energy-Efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-Based IoT Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(3): 319-330 (2024)
[j9]Hoai Luan Pham
, Vu Trung Duong Le
, Van Duy Tran
, Tuan Hai Vu, Yasuhiko Nakashima
:
LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography. IEEE Trans. Circuits Syst. I Regul. Pap. 71(10): 4624-4637 (2024)
[c32]Lam Duc Khai
, Tran Van Quang, Pham Hoai Luan:
A real-time JPEG image compression hardware design architecture. ACOMPA 2024: 29-36
[c31]Van Duy Tran, Tran Xuan Hieu Le, Thi Diem Tran, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Tinh Nguyen, Yasuhiko Nakashima:
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation. CANDARW 2024: 110-116
[c30]Vu Trung Duong Le, Anh Kiet Pham, Hoai Luan Pham, Tuan Hai Vu, Yasuhiko Nakashima:
PESA: Power-Efficient SPHINCS+ Accelerator for Multi-Domain Security Applications on FPGA SoC. CANDAR 2024: 231-237
[c29]Vu Tuan Hai, Vu Trung Duong Le, Pham Hoai Luan, Yasuhiko Nakashima:
Benchmarking Classical and Quantum Optimizers for Quantum Simulator. CANDAR 2024: 238-244
[c28]Pham Hoai Luan
, Hai Hau Nguyen, Vu Trung Duong Le, Thi Diem Tran, Tuan Hai Vu, Thi Hong Tran, Yasuhiko Nakashima:
MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements. COOL CHIPS 2024: 1-6
[c27]Binh Tan Ngo, Nghi Hoang Huu Thai, Hoai Luan Pham, Thi Diem Tran:
A High-Performance FPGA Based on Convolutional Neural Network for QRS Complex Detection. ICCCNT 2024: 1-6
[c26]Ngoc Hung Nguyen, Duc Hong An Le, Vu Trung Duong Le, Van Tinh Nguyen, Tuan Hai Vu, Hoai Luan Pham, Yasuhiko Nakashima:
LI-RV: A Fast and Efficient RISC-V based Coprocessor for Lightweight Cryptography. ISOCC 2024: 1-2
[c25]Pham Hoai Luan, Vu Trung Duong Le, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima:
CGLA: Coarse-Grained Linear Array for Multi-Hash Acceleration in Blockchain Mining. ISOCC 2024: 93-94
[c24]Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Van Duy Tran, Thi Diem Tran, Yasuhiko Nakashima:
UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications. ISOCC 2024: 95-96
[c23]Duc Hong An Le, Vu Trung Duong Le, Viet Anh Ho, Van Tinh Nguyen, Hoai Luan Pham, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima:
High-Efficiency RISC-V-Based Cryptographic Coprocessor for Security Applications. ISOCC 2024: 103-104
[c22]Vu Tuan Hai, Vo Minh Kiet, Vu Trung Duong Le, Pham Hoai Luan, Le Bin Ho, Yasuhiko Nakashima:
Quantum Battery Optimization through Quantum Machine Learning Techniques. ISOCC 2024: 121-122
[c21]Nhat Nguyen Dinh, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Duy Tran, Yasuhiko Nakashima:
Kyberator: A High-Efficiency FPGA-Based Multi-Mode CRYSTALS-Kyber Accelerator for Quantum-Resistant Security Applications. ISOCC 2024: 308-309
[c20]Hai Hau Nguyen, Pham Hoai Luan, Tuan Hai Vu, Van Duy Tran, Vu Trung Duong Le, Duc Khai Lam
, Thi Diem Tran, Yasuhiko Nakashima:
Hator: A High-Efficiency CGRA-Based 32/64-Bit Hashing Accelerator with Real-Time Performance Analysis. MCSoC 2024: 137-144
[c19]Tran Xuan Hieu Le, Pham Hoai Luan, Vu Tuan Hai, Vu Trung Duong Le, Yasuhiko Nakashima:
Theoretical Analysis of the Memory-Efficient Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs. MCSoC 2024: 366-373
[c18]Vu Tuan Hai, Vu Trung Duong Le, Pham Hoai Luan, Yasuhiko Nakashima:
Efficient Random Quantum Circuit Generator: A Benchmarking Approach for Quantum Simulators. RIVF 2024: 419-423
[i3]Van Duy Tran, Tran Xuan Hieu Le, Thi Diem Tran, Hoai Luan Pham
, Vu Trung Duong Le, Tuan Hai Vu, Van Tinh Nguyen, Yasuhiko Nakashima:
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation. CoRR abs/2407.17790 (2024)
[i2]Tran Xuan Hieu Le, Hoai Luan Pham, Tuan Hai Vu, Vu Trung Duong Le, Yasuhiko Nakashima:
Theoretical Analysis of the Efficient-Memory Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs. CoRR abs/2410.11146 (2024)
[i1]Tuan Hai Vu, Vu Trung Duong Le, Hoai Luan Pham, Quoc Chuong Nguyen
, Yasuhiko Nakashima:
FQsun: A Configurable Wave Function-Based Quantum Emulator for Power-Efficient Quantum Simulations. CoRR abs/2411.04471 (2024)- 2023
[j8]Hoai Luan Pham
, Thi Hong Tran
, Vu Trung Duong Le
, Yasuhiko Nakashima
:
Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications. IEEE Des. Test 40(5): 15-25 (2023)
[j7]Duc Khai Lam
, Cam Vinh Du
, Hoai Luan Pham
:
QuantLaneNet: A 640-FPS and 34-GOPS/W FPGA-Based CNN Accelerator for Lane Detection. Sensors 23(15): 6661 (2023)
[c17]Vu Trung Duong Le, Hoai Luan Pham
, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima:
Efficient and High-Speed CGRA Accelerator for Cryptographic Applications. candar 2023: 189-195
[c16]Vu Trung Duong Le, Hoai Luan Pham
, Thi Hong Tran, Quoc Duy Nam Nguyen
, Thi Sang Duong, Yasuhiko Nakashima:
Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications. ICICDT 2023: 104-107
[c15]Vu Trung Duong Le, Hoai Luan Pham
, Thi Sang Duong, Thi Hong Tran, Quoc Duy Nam Nguyen
, Yasuhiko Nakashima:
RHCP: A Reconfigurable High-efficient Cryptographic Processor for Decentralized IoT Platforms. KSE 2023: 1-6
[c14]Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Diem Tran, Ren Imamura, Quoc Duy Nam Nguyen
, Thi Hong Tran, Yasuhiko Nakashima:
Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission. MCSoC 2023: 419-425
[c13]Vu Trung Duong Le, Hoai Luan Pham
, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima:
High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing. MCSoC 2023: 576-583
[c12]Ren Imamura, Guangxian Zhu, Thi Sang Duong, Hoai Luan Pham
, Renyuan Zhang, Yasuhiko Nakashima:
Energy-Efficient 3D Convolution Using Interposed Memory Accelerator eXtension 2 for Medical Image Processing. MICAD 2023: 62-71
[c11]Pham Hoai Luan
, Thi Sang Duong, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima:
Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain. MWSCAS 2023: 355-359
[c10]Thi Sang Duong, Hoai Luan Pham
, Vu Trung Duong Le, Ren Imamura, Thi Hong Tran, Yasuhiko Nakashima:
Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing. RIVF 2023: 124-129
[c9]Thi Sang Duong, Hoai Luan Pham
, Vu Trung Duong Le
, Thi Hong Tran, Yasuhiko Nakashima:
Power-Efficient and Programmable Hashing Accelerator for Massive Message Processing. SOCC 2023: 1-6- 2022
[j6]Hoai Luan Pham
, Thi Hong Tran
, Vu Trung Duong Le
, Yasuhiko Nakashima
:
A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator. IEEE Access 10: 11830-11845 (2022)
[j5]Hoai Luan Pham
, Thi Hong Tran
, Vu Trung Duong Le
, Yasuhiko Nakashima
:
Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator. IEEE Access 10: 68740-68754 (2022)
[c8]Hoai Luan Pham
, Thi Hong Tran, Vu Trung Duong Le
, Yasuhiko Nakashima:
A Coarse Grained Reconfigurable Architecture for SHA-2 Acceleration. IPDPS Workshops 2022: 671-678
[c7]Pham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima:
A High-Efficiency FPGA-based BLAKE-256 Accelerator for Securing Blockchain Networks. MWSCAS 2022: 1-4
[c6]Vu Trung Duong Le
, Pham Hoai Luan
, Thi Hong Tran, Yasuhiko Nakashima:
CSIP: A Compact Scrypt IP design with single PBKDF2 core for Blockchain mining. SBCCI 2022: 1-6
[c5]Pham Hoai Luan
, Thi Hong Tran, Vu Trung Duong Le
, Yasuhiko Nakashima:
A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT Applications. SBCCI 2022: 1-6- 2021
[j4]Thi Hong Tran
, Hoai Luan Pham
, Yasuhiko Nakashima:
A High-Performance Multimem SHA-256 Accelerator for Society 5.0. IEEE Access 9: 39182-39192 (2021)
[j3]Vu Trung Duong Le
, Thi Hong Tran
, Hoai Luan Pham
, Duc Khai Lam
, Yasuhiko Nakashima
:
MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security. IEEE Access 9: 168383-168396 (2021)
[j2]Thi Hong Tran
, Hoai Luan Pham
, Tri Dung Phan
, Yasuhiko Nakashima
:
BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4245-4258 (2021)
[c4]Van Dai Phan, Hoai Luan Pham
, Thi Hong Tran, Yasuhiko Nakashima:
High Performance Multicore SHA-256 Accelerator using Fully Parallel Computation and Local Memory. COOL CHIPS 2021: 1-3- 2020
[j1]Hoai Luan Pham
, Thi Hong Tran
, Tri Dung Phan
, Vu Trung Duong Le
, Duc Khai Lam
, Yasuhiko Nakashima:
Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining. IEEE Access 8: 139634-139646 (2020)
2010 – 2019
- 2019
[c3]Van-Cam Nguyen, Hoai-Luan Pham
, Thi Hong Tran, Huu-Thuan Huynh
, Yasuhiko Nakashima:
Digitizing Invoice and Managing VAT Payment Using Blockchain Smart Contract. IEEE ICBC 2019: 74-77- 2018
[c2]Hoai Luan Pham
, Thi Hong Tran, Yasuhiko Nakashima:
A Secure Remote Healthcare System for Hospital Using Blockchain Smart Contract. GLOBECOM Workshops 2018: 1-6
[c1]Pham Hoai Luan
, Nguyen Xuan Duc, Duc Khai Lam
, Yuhei Nagao, Hiroshi Ochi:
Design and Hardware Implementation of Improved Precision Time Protocol for High Speed Automotive Wireless Transmission System. ISPACS 2018: 48-53
Coauthor Index

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last updated on 2026-02-17 22:42 CET by the dblp team
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