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Shreesha Srinath
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Publications
- 2017
[c9]Steve Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, Zhiru Zhang:
Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis. FPGA 2017: 189-194- 2016
[c7]Ritchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, Zhiru Zhang
:
Improving high-level synthesis with decoupled data structure optimization. DAC 2016: 137:1-137:6- 2014
[c5]Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang
, Christopher Batten:
Architectural Specialization for Inter-Iteration Loop Dependence Patterns. MICRO 2014: 583-595

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last updated on 2026-01-05 23:39 CET by the dblp team
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