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ORCIDJingyu Xu 0001
Person information
- affiliation: Tsinghua University, Department of Computer Science and Technology, Beijing, China
Other persons with the same name
- Jingyu Xu (aka: Jing-Yu Xu) — disambiguation page
- Jingyu Xu 0002
![[0009-0009-2586-516X]](https://dblp.org/img/orcid-mark.12x12.png "0009-0009-2586-516X")
— Wuhan University, National Engineering Research Center for Multimedia Software, Wuhan, China - Jingyu Xu 0003 — Northern Arizona University, Flagstaff, AZ, USA
- Jingyu Xu 0004 — Tianjin University of Technology, School of Electrical Engineering and Automation, Tianjin, China
- Jingyu Xu 0005 (aka: Jing-Yu Xu 0005) — Beijing Institute of Control and Electronics Technology, Beijing, China
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2000 – 2009
- 2008
[j9]Hailong Yao, Subarna Sinha, Jingyu Xu, Charles C. Chiang, Yici Cai, Xianlong Hong:
Efficient range pattern matching algorithm for process-hotspot detection. IET Circuits Devices Syst. 2(1): 2-15 (2008)- 2006
- [j8]Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu:
A coupling and crosstalk-considered timing-driven global routing algorithm for high-performance circuit design. Integr. 39(4): 457-473 (2006) - [j7]Jingyu Xu, Xianlong Hong, Tong Jing, Yang Yang:
Obstacle-avoiding rectilinear minimum-delay Steiner tree construction toward IP-block-based SOC design. IEEE Trans. Circuits Syst. II Express Briefs 53-II(4): 309-313 (2006) - 2005
- [j6]Jingyu Xu, Xianlong Hong, Tong Jing:
Timing-Driven Global Routing with Efficient Buffer Insertion. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(11): 3188-3195 (2005) - [c9]Tong Jing, Ling Zhang, Jinghong Liang, Jingyu Xu, Xianlong Hong, Jinjun Xiong, Lei He:
A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem. ASP-DAC 2005: 115-120 - [c8]Jingyu Xu, Xianlong Hong, Tong Jing:
Timing-driven global routing with efficient buffer insertion. ISCAS (3) 2005: 2449-2452 - [c7]Jingyu Xu, Xianlong Hong, Tong Jing, Yang Yang:
Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction towards IP-Block-Based SOC Design. ISQED 2005: 616-621 - 2004
- [j5]Tong Jing, Xianlong Hong, Jingyu Xu, Haiyun Bao, Chung-Kuan Cheng, Jun Gu:
UTACO: a unified timing and congestion optimization algorithm for standard cell global routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(3): 358-365 (2004) - [c6]Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu:
A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design. ASP-DAC 2004: 677-682 - [c5]Ling Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He:
Performance and RLC crosstalk driven global routing. ISCAS (5) 2004: 65-68 - 2003
- [j4]Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu:
A Novel Timing-Driven Global Routing Algorithm Considering Coupling Effects for High Performance Circuit Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3158-3167 (2003) - [j3]Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu:
An efficient hierarchical timing-driven Steiner tree algorithm for global routing. Integr. 35(2): 69-84 (2003) - [j2]Tong Jing, Xianlong Hong, Haiyun Bao, Jingyu Xu, Jun Gu:
SSTT: Efficient Local Search for GSI Global Routing. J. Comput. Sci. Technol. 18(5): 632-640 (2003) - [j1]Xianlong Hong, Tong Jing, Jingyu Xu, Haiyun Bao, Jun Gu:
CNB: A Critical-Network-Based Timing Optimization Method for Standard Cell Global Routing. J. Comput. Sci. Technol. 18(6): 732-738 (2003) - [c4]Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Chung-Kuan Cheng, Jun Gu:
UTACO: a unified timing and congestion optimizing algorithm for standard cell global routing. ASP-DAC 2003: 834-839 - [c3]Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu:
A novel timing-driven global routing algorithm considering coupling effects for high performance circuit design. ASP-DAC 2003: 847-850 - 2002
- [c2]Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Jun Gu:
A novel and efficient timing-driven global router for standard cell layout design based on critical network concept. ISCAS (1) 2002: 165-168 - [c1]Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu:
An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. ASP-DAC/VLSI Design 2002: 473-478
Coauthor Index
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