Variable Threshold MOSFET Approach (Through Dynamic Threshold MOSFET) For Universal Logic Gates

M. Satyam

K. Ragini M. Satyam B. C. Jinaga Variable Threshold MOSFET Approach (Through Dynamic Threshold MOSFET) For Universal Logic Gates http://arxiv.org/abs/1003.6030 2010 CoRR abs/1003.6030 db/journals/corr/corr1003.html#abs-1003-6030

N. Siva Sankara Reddy M. Satyam K. Lal Kishore Cascadable adiabatic logic circuits for low-power applications. 518-526 2008 2 IET Circuits Devices Syst. 6 https://doi.org/10.1049/iet-cds:20080106 db/journals/iet-cds/iet-cds2.html#ReddySK08

M. Raghupati K. Ramkumar M. Satyam Priority-oriented reservation multiple access scheme for data communication through satellites. 22-26 1985 8 Comput. Commun. 1 https://doi.org/10.1016/0140-3664(85)90127-6 db/journals/comcom/comcom8.html#RaghupatiRS85

B. C. Jinaga K. Lal Kishore M. Raghupati K. Ragini K. Ramkumar N. Siva Sankara Reddy