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ORCIDWei Cheng 0006
Person information
Other persons with the same name
- Wei Cheng — disambiguation page
- Wei Cheng 0001
![[0000-0002-3635-0745]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-3635-0745")
— University of Washington, School of Engineering and Technology, Tacoma, USA (and 2 more) - Wei Cheng 0002 — NEC Laboratories America, Princeton, USA (and 1 more)
- Wei Cheng 0003 — Télécom Paris & Institut Polytechnique de Paris, Paris, France (and 1 more)
- Wei Cheng 0004
- Wei Cheng 0005
- Wei Cheng 0007
- Wei Cheng 0008
- Wei Cheng 0009
- Wei Cheng 0010
- Wei Cheng 0011 — Fudan University, Institute of Science and Technology for Brain-Inspired Intelligence, Shanghai, China (and 1 more)
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2020 – today
- 2025
[c4]Wei Cheng, Zhihui Gao, Jose Guajardo, Hesham Beshary, Ali M. Niknejad, Tingjun Chen:
SPEAR+: Streaming-Based Multi-Channel SDR Implementation Using the RFSoC Platform. MILCOM 2025: 317-322- 2024
- [j2]Chun-Lin Chu, Yun-Chih Chen, Wei Cheng, Ing-Chao Lin, Yuan-Hao Chang:
AttentionRC: A Novel Approach to Improve Locality Sensitive Hashing Attention on Dual-Addressing Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 3925-3936 (2024) - [c3]Wei Cheng, Zhihui Gao, Tingjun Chen:
Real-time Wideband Software-defined Radio with Python Programmability based on RFSoC. MobiCom 2024: 1772-1774 - [c2]Wei Cheng, Zhihui Gao, Tingjun Chen:
SPEAR: Software-defined Python-Enhanced RFSoC for Wideband Radio Applications. MobiCom 2024: 1834-1841 - 2022
- [j1]Wei Cheng, Ing-Chao Lin, Yun-Yang Shih:
An Efficient Implementation of Convolutional Neural Network With CLIP-Q Quantization on FPGA. IEEE Trans. Circuits Syst. I Regul. Pap. 69(10): 4093-4102 (2022) - [c1]Wei Cheng, Chun-Feng Wu, Yuan-Hao Chang, Ing-Chao Lin:
GraphRC: Accelerating Graph Processing on Dual-Addressing Memory with Vertex Merging. ICCAD 2022: 21:1-21:9
Coauthor Index
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