Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches.

Mukesh Agrawal 0001 Intel Corp., Hillsboro, OR, USA Duke University, Durham, NC, USA Mukesh Agrawal Mukesh Agrawal 0002 Carnegie Mellon University, USA

Mainak Chaudhuri Mukesh Agrawal 0001 Jayesh Gaur Sreenivas Subramoney Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches. 7:1-7:29 2017 14 ACM Trans. Archit. Code Optim. 1 https://doi.org/10.1145/3046680 db/journals/taco/taco14.html#ChaudhuriAGS17

Mukesh Agrawal 0001 Krishnendu Chakrabarty Bill Eklow A Distributed, Reconfigurable, and Reusable BIST Infrastructure for Test and Diagnosis of 3-D-Stacked ICs. 309-322 2016 35 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 https://doi.org/10.1109/TCAD.2015.2459044 db/journals/tcad/tcad35.html#AgrawalCE16

Ran Wang 0002 Sergej Deutsch Mukesh Agrawal 0001 Krishnendu Chakrabarty The hype, myths, and realities of testing 3D integrated circuits. 58 2016 ICCAD https://doi.org/10.1145/2966986.2980097 conf/iccad/2016 db/conf/iccad/iccad2016.html#WangDAC16

Mukesh Agrawal 0001 Krishnendu Chakrabarty Randy Widialaksono Reuse-Based Optimization for Prebond and Post-Bond Testing of 3-D-Stacked ICs. 122-135 2015 34 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1 https://doi.org/10.1109/TCAD.2014.2369747 https://www.wikidata.org/entity/Q57439900 db/journals/tcad/tcad34.html#AgrawalCW15

Mukesh Agrawal 0001 Krishnendu Chakrabarty Test-Cost Modeling and Optimal Test-Flow Selection of 3-D-Stacked ICs. 1523-1536 2015 34 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 https://doi.org/10.1109/TCAD.2015.2419227 db/journals/tcad/tcad34.html#AgrawalC15

Mukesh Agrawal 0001 Optimization of Test and Design-for-Testability Solutions for Many-Core System-on-Chip Designs. 2014 Duke University, Durham, NC, USA https://hdl.handle.net/10161/9793 https://www.base-search.net/Record/783042c94fdb30b7234e79bc64557be742dac9bc6d8a13d74ddd6f9f4c3dcbf4 https://www.base-search.net/Record/d68614d21b65f6d5110d872c905feeb4496b05fd31ccebada38dad52a7d45f45 base-search.net (ftdukeunivdsp:oai:dukespace.lib.duke.edu:10161/9793) base-search.net (ftdukeunivdsp:oai:localhost:10161/9793)

Krishnendu Chakrabarty Mukesh Agrawal 0001 Sergej Deutsch Brandon Noia Ran Wang 0002 Fangming Ye Test and Design-for-Testability Solutions for 3D Integrated Circuits. 386-403 2014 9 Inf. Media Technol. 4 https://doi.org/10.11185/imt.9.386 db/journals/imt/imt9.html#Chakrabarty0DN014

Krishnendu Chakrabarty Mukesh Agrawal 0001 Sergej Deutsch Brandon Noia Ran Wang 0002 Fangming Ye Test and Design-for-Testability Solutions for 3D Integrated Circuits. 56-73 2014 7 IPSJ Trans. Syst. LSI Des. Methodol. https://doi.org/10.2197/ipsjtsldm.7.56 db/journals/ipsj/ipsj7.html#ChakrabartyADNWY14

Mukesh Agrawal 0001 Michael Richter 0002 Krishnendu Chakrabarty Test-Delivery Optimization in Manycore SOCs. 1067-1080 2014 33 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 https://doi.org/10.1109/TCAD.2014.2311394 db/journals/tcad/tcad33.html#AgrawalRC14

Mukesh Agrawal 0001 Krishnendu Chakrabarty Bill Eklow A distributed, reconfigurable, and reusable bist infrastructure for 3D-stacked ICs. 1-10 2014 ITC https://doi.org/10.1109/TEST.2014.7035333 https://doi.ieeecomputersociety.org/10.1109/TEST.2014.7035333 conf/itc/2014 db/conf/itc/itc2014.html#AgrawalCE14 Mukesh Agrawal 0001 Krishnendu Chakrabarty Test-time optimization in NOC-based manycore SOCs using multicast routing. 1-6 2014 VTS https://doi.org/10.1109/VTS.2014.6818797 https://doi.ieeecomputersociety.org/10.1109/VTS.2014.6818797 conf/vts/2014 db/conf/vts/vts2014.html#AgrawalC14 Mukesh Agrawal 0001 Krishnendu Chakrabarty A graph-theoretic approach for minimizing the number of wrapper cells for pre-bond testing of 3D-stacked ICs. 1-10 2013 ITC https://doi.org/10.1109/TEST.2013.6651895 https://doi.ieeecomputersociety.org/10.1109/TEST.2013.6651895 conf/itc/2013 db/conf/itc/itc2013.html#AgrawalC13 Mukesh Agrawal 0001 Krishnendu Chakrabarty Test-cost optimization and test-flow selection for 3D-stacked ICs. 1-6 2013 VTS https://doi.org/10.1109/VTS.2013.6548941 https://doi.ieeecomputersociety.org/10.1109/VTS.2013.6548941 conf/vts/2013 db/conf/vts/vts2013.html#AgrawalC13 Mukesh Agrawal 0001 Michael Richter 0002 Krishnendu Chakrabarty A dynamic programming solution for optimizing test delivery in multicore SOCs. 1-10 2012 ITC https://doi.org/10.1109/TEST.2012.6401535 https://doi.ieeecomputersociety.org/10.1109/TEST.2012.6401535 conf/itc/2012 db/conf/itc/itc2012.html#AgrawalRC12 Krishnendu Chakrabarty Mainak Chaudhuri Sergej Deutsch Bill Eklow Jayesh Gaur Brandon Noia Michael Richter 0002 Sreenivas Subramoney Ran Wang 0002 Randy Widialaksono Fangming Ye