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"Scaling the Performance of Tiled Processor Architectures with ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Yongqing Ren et al. (2009)

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DOI: 10.1109/CSO.2009.233

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  dblp key:
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  - https://dblp.org/rec/conf/cso/RenACXW09
Yongqing Ren, Hong An, Ming Cong, Guang Xu, Li Wang:
Scaling the Performance of Tiled Processor Architectures with On-Chip-Network Topology. CSO (1) 2009: 77-81

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