


default search action
"A CAD approach for on-chip PDN with power and supply noise reduction for ..."
Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti (2017)
- Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti

:
A CAD approach for on-chip PDN with power and supply noise reduction for multi-voltage SOCS in pre-layout stage. ISED 2017: 1-4

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













