<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<inproceedings key="conf/ispd/JiangCYTC11" mdate="2018-11-06">
<author>Iris Hui-Ru Jiang</author>
<author>Chih-Long Chang</author>
<author>Yu-Ming Yang</author>
<author>Evan Y.-W. Tsai</author>
<author>Lancer S.-F. Chen</author>
<title>INTEGRA: fast multi-bit flip-flop clustering for clock power saving based on interval graphs.</title>
<pages>115-122</pages>
<year>2011</year>
<booktitle>ISPD</booktitle>
<ee>https://doi.org/10.1145/1960397.1960424</ee>
<crossref>conf/ispd/2011</crossref>
<url>db/conf/ispd/ispd2011.html#JiangCYTC11</url>
</inproceedings></dblp>
