"Accelerating More Secure RC4 : Implementation of Seven FPGA Designs in ..."

Rourab Paul et al. (2016)

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type: Informal or Other Publication

metadata version: 2018-08-13

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Rourab Paul, Hemanta Dey, Amlan Chakrabarti, Ranjan Ghosh:
Accelerating More Secure RC4 : Implementation of Seven FPGA Designs in Stages upto 8 byte per clock. CoRR abs/1609.01389 (2016)

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