"Low Latency CMOS Hardware Acceleration for Fully Connected Layers in Deep ..."

Nick Iliev, Amit Ranjan Trivedi (2020)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2020-12-01

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-2011-12839
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  - https://dblp.org/rec/journals/corr/abs-2011-12839
Nick Iliev, Amit Ranjan Trivedi:
Low Latency CMOS Hardware Acceleration for Fully Connected Layers in Deep Neural Networks. CoRR abs/2011.12839 (2020)

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