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"Robustness comparison of DG FinFETs with symmetric, asymmetric, tied and ..."
Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal (2010)
- Ramesh Vaddi

, Sudeb Dasgupta, R. P. Agarwal:
Robustness comparison of DG FinFETs with symmetric, asymmetric, tied and independent gate options with circuit co-design for ultra low power subthreshold logic. Microelectron. J. 41(4): 195-211 (2010)

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