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Oluseyi A. Ayorinde

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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2020 – today

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2021
[c6]
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Peter Gadfort, Oluseyi A. Ayorinde:
FPNA: A Reconfigurable Accelerator for AI Inference at the Edge. SoCC 2021: 242-247

2010 – 2019

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2019
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Christopher J. Lukas, Farah B. Yahya, Jacob Breiholz, Abhishek Roy, Xing Chen, Harsh N. Patel, Ningxi Liu, Avish Kosari, Shuo Li, Divya Akella Kamakshi, Oluseyi A. Ayorinde, David D. Wentzloff, Benton H. Calhoun:
A 1.02 μW Battery-Less, Continuous Sensing and Post-Processing SiP for Wearable Applications. IEEE Trans. Biomed. Circuits Syst. 13(2): 271-281 (2019)
2018
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Oluseyi A. Ayorinde, He Qi, Benton H. Calhoun:
FGC: A Tool-flow for Generating and Configuring Custom FPGAs(Abstract Only). FPGA 2018: 294
2016
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He Qi, Oluseyi A. Ayorinde, Benton H. Calhoun:
An energy-efficient near/sub-threshold FPGA interconnect architecture using dynamic voltage scaling and power-gating. FPT 2016: 20-27
2015
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Oluseyi A. Ayorinde, He Qi, Yu Huang, Benton H. Calhoun:
Using island-style bi-directional intra-CLB routing in low-power FPGAs. FPL 2015: 1-7
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He Qi, Oluseyi A. Ayorinde, Yu Huang, Benton H. Calhoun:
Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs. FPL 2015: 1-4
2013
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Oluseyi A. Ayorinde, Benton H. Calhoun:
Circuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only). FPGA 2013: 277

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