FastTrackGPU: Static-Analysis-Guided Analytical Modeling for Softcore GPUs.

Blaise-Pascal Tine Blaise Tine https://blaisetine.github.io/ https://scholar.google.com/citations?user=HxCaIqwAAAAJ UCLA, CA, USA Georgia Institute of Technology, GA, USA

Chihyo Ahn Shinnung Jeong Liam Paul Cooper Ruobing Han Huanzhi Pu Nicholas Parnenzini Jisheng Zhao Blaise Tine Hyesoon Kim FastTrackGPU: Static-Analysis-Guided Analytical Modeling for Softcore GPUs. 2026 January - June 162-165 25 IEEE Comput. Archit. Lett. 1 https://doi.org/10.1109/LCA.2026.3677349 db/journals/cal/cal25.html#AhnJCHPPZTK26 streams/journals/cal

Shinnung Jeong Chihyo Ahn Huanzhi Pu Jisheng Zhao Hyesoon Kim Blaise Tine Inside VOLT: Designing an Open-Source GPU Compiler (Tool). 155-167 2026 CC https://doi.org/10.1145/3771775.3786275 conf/cc/2026 db/conf/cc/cc2026.html#JeongAPZKT26 Chihyo Ahn Ruobing Han Udit Subramanya Jisheng Zhao Blaise Tine Hyesoon Kim SoftCUDA: Running CUDA on Softcore GPU. 138-142 2025 FCCM https://doi.org/10.1109/FCCM62733.2025.00049 conf/fccm/2025 db/conf/fccm/fccm2025.html#AhnHSZTK25 Martin Troiber Martin Schulz 0001 Blaise Tine Hyesoon Kim Analysis of the RISC-V Vector Extension for Vulkan Graphics Kernels. 388-389 2025 ISPASS https://doi.org/10.1109/ISPASS64960.2025.00053 conf/ispass/2025 db/conf/ispass/ispass2025.html#TroiberSTK25 streams/conf/ispass

Injae Shin Blaise Tine Multiport Support for Vortex OpenGPU Memory Hierarchy. 2025 March abs/2503.17602 CoRR https://doi.org/10.48550/arXiv.2503.17602 db/journals/corr/corr2503.html#abs-2503-17602 streams/journals/corr

Shinnung Jeong Chihyo Ahn Huanzhi Pu Jisheng Zhao Hyesoon Kim Blaise Tine Inside VOLT: Designing an Open-Source GPU Compiler. 2025 November abs/2511.13751 CoRR https://doi.org/10.48550/arXiv.2511.13751 db/journals/corr/corr2511.html#abs-2511-13751 streams/journals/corr

Nikhil Rout Blaise Tine A Configurable Mixed-Precision Fused Dot Product Unit for GPGPU Tensor Computation. 2025 December abs/2512.00053 CoRR https://doi.org/10.48550/arXiv.2512.00053 db/journals/corr/corr2512.html#abs-2512-00053 streams/journals/corr

Blaise Tine Vertical Integration in Open-Source Hardware-Software Co-Design for Accelerator Architecture Research. 2024 Georgia Institute of Technology, Atlanta, GA, USA https://hdl.handle.net/1853/75184 https://www.base-search.net/Record/023be0aee1fa222da71ac0abfc47c817d60a3485ee4dd601c472f5d80ba73981 base-search.net (ftgeorgiatech:oai:repository.gatech.edu:1853/75184) Blaise Tine Hyesoon Kim Towards "True" GPU Performance Scaling for OpenGPU. 1-10 2024 HCS https://doi.org/10.1109/HCS61935.2024.10665202 conf/hotchips/2024 db/conf/hotchips/hotchips2024.html#TineK24 Blaise Tine Varun Saxena Santosh Srivatsan Joshua R. Simpson Fadi Alzammar Liam Cooper Hyesoon Kim Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs. 616-630 2023 ASPLOS (3) https://doi.org/10.1145/3582016.3582024 https://www.wikidata.org/entity/Q130946887 conf/asplos/2023-3 db/conf/asplos/asplos2023-3.html#TineSSSACK23 Blaise Tine Varun Saxena Santosh Srivatsan Joshua R. Simpson Fadi Alzammar Liam Paul Cooper Sam Jijina Swetha Rajagoplan Tejaswini Anand Kumar Jeffrey Young 0001 Hyesoon Kim Accelerating Graphic Rendering on Programmable RISC-V GPUs. 1-15 2022 HCS https://doi.org/10.1109/HCS55958.2022.9895607 conf/hotchips/2022 db/conf/hotchips/hotchips2022.html#TineSSSACJRKYK22 Blaise Tine Krishna Praveen Yalamarthy Fares Elsabbagh Hyesoon Kim Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics. 754-766 2021 MICRO https://doi.org/10.1145/3466752.3480128 conf/micro/2021 db/conf/micro/micro2021.html#TineYEK21

Ruobing Han Blaise Tine Jaewon Lee Jaewoong Sim Hyesoon Kim Supporting CUDA for an extended RISC-V GPU architecture. 2021 abs/2109.00673 CoRR https://arxiv.org/abs/2109.00673 db/journals/corr/corr2109.html#abs-2109-00673

Blaise Tine Fares Elsabbagh Krishna Praveen Yalamarthy Hyesoon Kim Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch. 2021 abs/2110.10857 CoRR https://arxiv.org/abs/2110.10857 db/journals/corr/corr2110.html#abs-2110-10857

Blaise-Pascal Tine Sudhakar Yalamanchili Hyesoon Kim Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. 157-162 2020 DATE https://doi.org/10.23919/DATE48585.2020.9116253 conf/date/2020 db/conf/date/date2020.html#TineYK20 Blaise Tine Seyong Lee Jeffrey S. Vetter Hyesoon Kim Productive Hardware Designs using Hybrid HLS-RTL Development. 311 2020 FPGA https://doi.org/10.1145/3373087.3375338 conf/fpga/2020 db/conf/fpga/fpga2020.html#TineLVK20 Blaise Tine Fares Elsabbagh Seyong Lee Jeffrey S. Vetter Hyesoon Kim Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping. 321 2020 FPGA https://doi.org/10.1145/3373087.3375340 conf/fpga/2020 db/conf/fpga/fpga2020.html#TineELVK20

Fares Elsabbagh Blaise Tine Priyadarshini Roshan Ethan Lyons Euna Kim Da Eun Shim Lingjun Zhu Sung Kyu Lim Hyesoon Kim Vortex: OpenCL Compatible RISC-V GPGPU. 2020 abs/2002.12151 CoRR https://arxiv.org/abs/2002.12151 db/journals/corr/corr2002.html#abs-2002-12151

Blaise-Pascal Tine Sudhakar Yalamanchili Hyesoon Kim Jeffrey S. Vetter POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. 481-482 2019 PACT https://doi.org/10.1109/PACT.2019.00055 conf/IEEEpact/2019 db/conf/IEEEpact/pact2019.html#TineYKV19 Blaise-Pascal Tine Sudhakar Yalamanchili Pagevault: securing off-chip memory using page-based authentication. 293-304 2017 MEMSYS https://doi.org/10.1145/3132402.3132439 conf/memsys/2017 db/conf/memsys/memsys2017.html#TineY17 Chihyo Ahn Fadi Alzammar Liam CooperLiam Paul Cooper Fares Elsabbagh Ruobing Han Shinnung Jeong Sam Jijina Euna Kim Hyesoon Kim Tejaswini Anand Kumar Jaewon Lee Seyong Lee Sung Kyu Lim Ethan Lyons Nicholas Parnenzini Huanzhi Pu Swetha Rajagoplan Priyadarshini Roshan Nikhil Rout Varun Saxena Martin Schulz 0001 Da Eun Shim Injae Shin Jaewoong Sim Joshua R. Simpson Santosh Srivatsan Udit Subramanya Martin Troiber Jeffrey S. Vetter Sudhakar Yalamanchili Krishna Praveen Yalamarthy Jeffrey Young 0001 Jisheng Zhao Lingjun Zhu