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<dblpperson name="Emilio Rapuano" pid="253/1280" n="7">
<person key="homepages/253/1280" mdate="2019-11-19">
<author pid="253/1280">Emilio Rapuano</author>
</person>
<r><inproceedings key="conf/applepies/BordonaroRBF24" mdate="2025-06-06">
<author pid="406/7954">Lorenzo Bordonaro</author>
<author pid="253/1280">Emilio Rapuano</author>
<author pid="51/6944">Sara Bocchio</author>
<author pid="25/1398">Luca Fanucci</author>
<title>Integration of the Open-Source RISC-V Formal Verification Framework into the STMicroelectronics Toolchain and Its Application to the STRiVe2.4 CPU.</title>
<pages>48-55</pages>
<year>2024</year>
<booktitle>ApplePies</booktitle>
<ee>https://doi.org/10.1007/978-3-031-84100-2_6</ee>
<crossref>conf/applepies/2024</crossref>
<url>db/conf/applepies/applepies2024.html#BordonaroRBF24</url>
</inproceedings>
</r>
<r><article key="journals/access/PaciniRF23" mdate="2023-04-29">
<author orcid="0000-0001-8551-717X" pid="275/7577">Tommaso Pacini</author>
<author orcid="0000-0002-4889-0968" pid="253/1280">Emilio Rapuano</author>
<author orcid="0000-0001-5426-4974" pid="25/1398">Luca Fanucci</author>
<title>FPG-AI: A Technology-Independent Framework for the Automation of CNN Deployment on FPGAs.</title>
<pages>32759-32775</pages>
<year>2023</year>
<volume>11</volume>
<journal>IEEE Access</journal>
<ee type="oa">https://doi.org/10.1109/ACCESS.2023.3263392</ee>
<url>db/journals/access/access11.html#PaciniRF23</url>
</article>
</r>
<r><article key="journals/remotesensing/RapuanoMPDFGF21" mdate="2021-05-26">
<author pid="253/1280">Emilio Rapuano</author>
<author pid="195/7817">Gabriele Meoni</author>
<author pid="275/7577">Tommaso Pacini</author>
<author pid="224/6223">Gianmarco Dinelli</author>
<author pid="157/9040">Gianluca Furano</author>
<author pid="242/5613">Gianluca Giuffrida</author>
<author pid="25/1398">Luca Fanucci</author>
<title>An FPGA-Based Hardware Accelerator for CNNs Inference on Board Satellites: Benchmarking with Myriad 2-Based Solution for the CloudScout Case Study.</title>
<pages>1518</pages>
<year>2021</year>
<volume>13</volume>
<journal>Remote. Sens.</journal>
<number>8</number>
<ee type="oa">https://doi.org/10.3390/rs13081518</ee>
<url>db/journals/remotesensing/remotesensing13.html#RapuanoMPDFGF21</url>
</article>
</r>
<r><inproceedings key="conf/applepies/CominoPRF21" mdate="2022-04-12">
<author pid="318/0044">Corrado Comino</author>
<author pid="275/7577">Tommaso Pacini</author>
<author pid="253/1280">Emilio Rapuano</author>
<author pid="25/1398">Luca Fanucci</author>
<title>Design and Implementation of an FPGA-Based CNN Hardware Accelerator Using Partial Reconfigurability: The CloudScout Case Study.</title>
<pages>187-193</pages>
<year>2021</year>
<booktitle>ApplePies</booktitle>
<ee>https://doi.org/10.1007/978-3-030-95498-7_26</ee>
<crossref>conf/applepies/2021</crossref>
<url>db/conf/applepies/applepies2021.html#CominoPRF21</url>
</inproceedings>
</r>
<r><article key="journals/esticas/DinelliMRPF20" mdate="2021-09-16">
<author orcid="0000-0003-0123-7977" pid="224/6223">Gianmarco Dinelli</author>
<author orcid="0000-0001-9311-6392" pid="195/7817">Gabriele Meoni</author>
<author orcid="0000-0002-4889-0968" pid="253/1280">Emilio Rapuano</author>
<author orcid="0000-0001-8551-717X" pid="275/7577">Tommaso Pacini</author>
<author orcid="0000-0001-5426-4974" pid="25/1398">Luca Fanucci</author>
<title>MEM-OPT: A Scheduling and Data Re-Use System to Optimize On-Chip Memory Usage for CNNs On-Board FPGAs.</title>
<pages>335-347</pages>
<year>2020</year>
<volume>10</volume>
<journal>IEEE J. Emerg. Sel. Topics Circuits Syst.</journal>
<number>3</number>
<ee>https://doi.org/10.1109/JETCAS.2020.3015294</ee>
<url>db/journals/esticas/esticas10.html#DinelliMRPF20</url>
</article>
</r>
<r><inproceedings key="conf/iscas/DinelliMRF20" mdate="2021-01-18">
<author pid="224/6223">Gianmarco Dinelli</author>
<author pid="195/7817">Gabriele Meoni</author>
<author pid="253/1280">Emilio Rapuano</author>
<author pid="25/1398">Luca Fanucci</author>
<title>Advantages and Limitations of Fully on-Chip CNN FPGA-Based Hardware Accelerator.</title>
<pages>1-5</pages>
<year>2020</year>
<booktitle>ISCAS</booktitle>
<ee>https://doi.org/10.1109/ISCAS45731.2020.9180867</ee>
<crossref>conf/iscas/2020</crossref>
<url>db/conf/iscas/iscas2020.html#DinelliMRF20</url>
</inproceedings>
</r>
<r><article key="journals/ijrc/DinelliMRBF19" mdate="2021-01-26">
<author orcid="0000-0003-0123-7977" pid="224/6223">Gianmarco Dinelli</author>
<author orcid="0000-0001-9311-6392" pid="195/7817">Gabriele Meoni</author>
<author orcid="0000-0002-4889-0968" pid="253/1280">Emilio Rapuano</author>
<author orcid="0000-0002-1723-7421" pid="236/3206">Gionata Benelli</author>
<author orcid="0000-0001-5426-4974" pid="25/1398">Luca Fanucci</author>
<title>An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick.</title>
<pages>7218758:1-7218758:13</pages>
<year>2019</year>
<volume>2019</volume>
<journal>Int. J. Reconfigurable Comput.</journal>
<ee type="oa">https://doi.org/10.1155/2019/7218758</ee>
<url>db/journals/ijrc/ijrc2019.html#DinelliMRBF19</url>
</article>
</r>
<coauthors n="10" nc="1">
<co c="0"><na f="b/Benelli:Gionata" pid="236/3206">Gionata Benelli</na></co>
<co c="0"><na f="b/Bocchio:Sara" pid="51/6944">Sara Bocchio</na></co>
<co c="0"><na f="b/Bordonaro:Lorenzo" pid="406/7954">Lorenzo Bordonaro</na></co>
<co c="0"><na f="c/Comino:Corrado" pid="318/0044">Corrado Comino</na></co>
<co c="0"><na f="d/Dinelli:Gianmarco" pid="224/6223">Gianmarco Dinelli</na></co>
<co c="0"><na f="f/Fanucci:Luca" pid="25/1398">Luca Fanucci</na></co>
<co c="0"><na f="f/Furano:Gianluca" pid="157/9040">Gianluca Furano</na></co>
<co c="0"><na f="g/Giuffrida:Gianluca" pid="242/5613">Gianluca Giuffrida</na></co>
<co c="0"><na f="m/Meoni:Gabriele" pid="195/7817">Gabriele Meoni</na></co>
<co c="0"><na f="p/Pacini:Tommaso" pid="275/7577">Tommaso Pacini</na></co>
</coauthors>
</dblpperson>

