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Jiafei Yao

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Jing Chen 0032

> Home > Persons > Jiafei Yao

Publications

2026
[j12]
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Jing Chen, Haiwei Tan, Yuxuan Dai, Man Li, Kemeng Yang, Jiafei Yao, Jun Zhang, Yufeng Guo:
Output and transfer characteristics prediction of GaN HEMT via neural-network-based compact model parameters extraction. Microelectron. J. 169: 107029 (2026)
[j11]
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Ziwei Hu, Jiafei Yao, Fan Yang, Zijing Yue, Yuxuan Dai, Jing Chen, Kemeng Yang, Man Li, Jun Zhang, Maolin Zhang, Yufeng Guo:
High performance 4H-SiC double-trench super-junction MOSFET with embedded SBD. Microelectron. J. 174: 107242 (2026)
[j10]
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Kemeng Yang, Haoyu Pan, Lingyun Zhang, Zhibo Fan, Hang Chen, Jing Chen, Jiafei Yao, Jun Zhang, Yufeng Guo:
High breakdown GaN-on-Si HEMT with a self-modulated substrate voltage. Microelectron. J. 174: 107258 (2026)
2025
[j7]
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Ziwei Hu, Jiafei Yao, Fan Yang, Yuxuan Dai, Kemeng Yang, Man Li, Jing Chen, Maolin Zhang, Jun Zhang, Yufeng Guo:
A novel double-trench SiC SBD-embedded MOSFET with improved figure-of-merit and short-circuit ruggedness. Microelectron. J. 155: 106495 (2025)
[j6]
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Man Li, Xinyu Zhang, Kemeng Yang, Jiafei Yao, Jun Zhang, Jing Chen, Yufeng Guo:
Self-adaptive body bias tuning technique for enhancing Baliga's figure-of-merit (BFOM) in thin bulk silicon LDMOS. Microelectron. J. 156: 106559 (2025)
[j5]
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Yuxuan Dai, Jiafei Yao, Jing Chen, Maolin Zhang, Yucheng Xu, Qing Yao, Qingyou Qian, Jun Zhang, Kemeng Yang, Yufeng Guo:
A cross-scale investigation on transient electrothermal performance for power MOSFETs at device-package level. Microelectron. J. 156: 106561 (2025)
[j4]
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Qing Yao, Jing Chen, Kemeng Yang, Jiafei Yao, Jun Zhang, Yuxuan Dai, Weihua Tang, Bo Zhang, Yufeng Guo:
Efficient Automatic Design of IGBT Structural Parameters Using Differential Evolution and Machine Learning Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(3): 1059-1069 (2025)
2024
[j2]
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Jing Chen, Jiajun Guo, Qing Yao, Kemeng Yang, Jun Zhang, Jiafei Yao, Yufeng Guo:
Step thickness drift region automatic design of SOI LDMOS using physics-inspired constrained simulated annealing algorithm. Microelectron. J. 153: 106410 (2024)
[j1]
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Jing Chen, Jiahao Wu, Wei Du, Qing Yao, Kemeng Yang, Jun Zhang, Jiafei Yao, Yufeng Guo:
General neural network-based static performance prediction model construction techniques for gate-all-around and planar field effect transistor. Microelectron. J. 154: 106485 (2024)

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