A GHz-Range Single-Bit Bandpass Delta-Sigma Modulator With FIR-DACs Achieving 64-dB SNDR Over 20-MHz Bandwidth.

Shanthi Pavan

Javad Gorji Luis A. Camuñas-Mesa Shanthi Pavan José M. de la Rosa 0001 A GHz-Range Single-Bit Bandpass Delta-Sigma Modulator With FIR-DACs Achieving 64-dB SNDR Over 20-MHz Bandwidth. 2026 341-352 7 IEEE Open J. Circuits Syst. https://doi.org/10.1109/OJCAS.2026.3693591 db/journals/ojcands/ojcands7.html#GorjiCPR26 streams/journals/ojcands

Chaitanya Kumar Shanthi Pavan Weak Nonlinearities in Active Filters and Continuous-Time Pipeline ADCs. 7565-7577 2025 December 72 IEEE Trans. Circuits Syst. I Regul. Pap. 12 https://doi.org/10.1109/TCSI.2025.3571932 db/journals/tcasI/tcasI72.html#KumarP25 streams/journals/tcasI

Shanthi Pavan Noise in Periodically-Switched RLC Networks. 1847-1851 2025 December 72 IEEE Trans. Circuits Syst. II Express Briefs 12 https://doi.org/10.1109/TCSII.2025.3590451 db/journals/tcasII/tcasII72.html#Pavan25 streams/journals/tcasII

Shanthi Pavan A "Nyquist-Like" Noise Theorem for Linear Periodically-Switched RLC Networks. 1-5 2025 ISCAS https://doi.org/10.1109/ISCAS56072.2025.11044013 conf/iscas/2025 db/conf/iscas/iscas2025.html#Pavan25

Shanthi Pavan Saravana Manivannan Nishanth Basavaraj Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining. 268-281 2024 January 59 IEEE J. Solid State Circuits 1 https://doi.org/10.1109/JSSC.2023.3276633 db/journals/jssc/jssc59.html#PavanMB24

Javad Gorji Shanthi Pavan José M. de la Rosa 0001 On the Use of FIR Feedback in Bandpass Delta-Sigma Modulators. 1082-1092 2024 March 71 IEEE Trans. Circuits Syst. I Regul. Pap. 3 https://doi.org/10.1109/TCSI.2023.3336719 db/journals/tcasI/tcasI71.html#GorjiPR24

Shanthi Pavan Systematic Development of CMOS PTAT Circuits. 1-5 2024 ISCAS https://doi.org/10.1109/ISCAS58744.2024.10557945 conf/iscas/2024 db/conf/iscas/iscas2024.html#Pavan24

Shanthi Pavan Gabor C. Temes Reciprocity and Inter-Reciprocity: A Tutorial - Part I: Linear Time-Invariant Networks. 3413-3421 2023 September 70 IEEE Trans. Circuits Syst. I Regul. Pap. 9 https://doi.org/10.1109/TCSI.2023.3276700 db/journals/tcasI/tcasI70.html#PavanT23

Shanthi Pavan Gabor C. Temes Reciprocity and Inter-Reciprocity: A Tutorial - Part II: Linear Periodically Time-Varying Networks. 3422-3435 2023 September 70 IEEE Trans. Circuits Syst. I Regul. Pap. 9 https://doi.org/10.1109/TCSI.2023.3294298 db/journals/tcasI/tcasI70.html#PavanT23a

Chaitanya Kumar Shanthi Pavan Power-Noise Trade-Offs in Continuous-Time Pipelined ADCs and Active Filters. 3832-3842 2023 October 70 IEEE Trans. Circuits Syst. I Regul. Pap. 10 https://doi.org/10.1109/TCSI.2023.3302832 db/journals/tcasI/tcasI70.html#KumarP23

Nishanth Basavaraj Shanthi Pavan Digital Reconstruction in Continuous-Time Pipelined Analog-to-Digital Converters. 5086-5097 2023 December 70 IEEE Trans. Circuits Syst. I Regul. Pap. 12 https://doi.org/10.1109/TCSI.2023.3318694 db/journals/tcasI/tcasI70.html#BasavarajP23

Alok Baluni Shanthi Pavan A 13.5 mW Decimator for a 20 MHz bandwidth CTΔΣ Modulator using poly-phase decomposition techniques. 1-6 2023 ICECS https://doi.org/10.1109/ICECS58634.2023.10382886 conf/icecsys/2023 db/conf/icecsys/icecsys2023.html#BaluniP23 Javad Gorji Shanthi Pavan José M. de la Rosa 0001 Bandpass $\Delta \Sigma$ Modulators with FIR Feedback. 1-5 2023 ISCAS https://doi.org/10.1109/ISCAS46773.2023.10181916 conf/iscas/2023 db/conf/iscas/iscas2023.html#GorjiP023

Raviteja Theertham Satya Narayana Ganta Shanthi Pavan Design of High-Resolution Continuous-Time Delta-Sigma Data Converters With Dual Return-to-Open DACs. 3418-3428 2022 57 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/JSSC.2022.3176876 https://www.wikidata.org/entity/Q114629253 db/journals/jssc/jssc57.html#TheerthamGP22

Shanthi Pavan Saravana Manivannan Analysis of RC Time-Constant Variations in Continuous-Time Pipelined ADCs. 530-540 2022 69 IEEE Trans. Circuits Syst. I Regul. Pap. 2 https://doi.org/10.1109/TCSI.2021.3121418 db/journals/tcasI/tcasI69.html#PavanM22

Saravana Manivannan Shanthi Pavan Improved Multistage Continuous-Time Pipelined Analog-to-Digital Converters and the Implicit Decimation Property. 3102-3113 2022 69 IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2022.3173563 db/journals/tcasI/tcasI69.html#ManivannanP22

Raviteja Theertham Shanthi Pavan Alias Rejection in CT Delta-Sigma ADCs Using Virtual-Ground-Switched Resistor Feedback. 1991-1995 2022 69 IEEE Trans. Circuits Syst. II Express Briefs 4 https://doi.org/10.1109/TCSII.2021.3089914 db/journals/tcasII/tcasII69.html#TheerthamP22

Shanthi Pavan Systematic Development of CMOS Fixed-Transconductance Bias Circuits. 2394-2397 2022 69 IEEE Trans. Circuits Syst. II Express Briefs 5 https://doi.org/10.1109/TCSII.2022.3158358 db/journals/tcasII/tcasII69.html#Pavan22

Nishanth Basavaraj Saravana Manivannan Shanthi Pavan Simplified Simulation and Measurement of the Signal Transfer Function of a Continuous-Time Pipelined Analog-to-Digital Converter. 3993-3997 2022 69 IEEE Trans. Circuits Syst. II Express Briefs 10 https://doi.org/10.1109/TCSII.2022.3179772 db/journals/tcasII/tcasII69.html#BasavarajMP22

Wei Shi 0011 Xing Wang Xiyuan Tang Abhishek Mukherjee Raviteja Theertham Shanthi Pavan Lu Jie 0001 Nan Sun 0001 A 0.37mm2 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2nd-order Vector-Quantizer DEM. 1-2 2022 CICC https://doi.org/10.1109/CICC53496.2022.9772865 conf/cicc/2022 db/conf/cicc/cicc2022.html#ShiWTMTPJS22 Chaitanya Kumar Saravana Manivannan Shanthi Pavan Analysis of Flash ADC Loading on the Performance of a Continuous-Time Pipelined ADC. 2792-2796 2022 ISCAS https://doi.org/10.1109/ISCAS48785.2022.9937563 conf/iscas/2022 db/conf/iscas/iscas2022.html#KumarMP22

Alok Baluni Shanthi Pavan Analysis and Design of a 20-MHz Bandwidth Continuous-Time Delta-Sigma Modulator With Time-Interleaved Virtual-Ground-Switched FIR Feedback. 729-738 2021 56 IEEE J. Solid State Circuits 3 https://doi.org/10.1109/JSSC.2020.3025573 db/journals/jssc/jssc56.html#BaluniP21

Shanthi Pavan Tanmay Halder Anand Kannan Continuous-Time Incremental Delta-Sigma Modulators With FIR Feedback. 3222-3231 2021 68 IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2021.3080379 db/journals/tcasI/tcasI68.html#PavanHK21

Shanthi Pavan Hajime Shibata Continuous-Time Pipelined Analog-to-Digital Converters: A Mini-Tutorial. 810-815 2021 68 IEEE Trans. Circuits Syst. II Express Briefs 3 https://doi.org/10.1109/TCSII.2020.3048850 db/journals/tcasII/tcasII68.html#PavanS21

Udita Mukherjee Tanmay Halder Anand Kannan Sovan Ghosh Shanthi Pavan A 28.5µW All-Analog Voice-Activity Detector. 1-5 2021 ISCAS https://doi.org/10.1109/ISCAS51556.2021.9401504 conf/iscas/2021 db/conf/iscas/iscas2021.html#MukherjeeHKGP21

Raviteja Theertham Prasanth Koottala Sujith Billa Shanthi Pavan Design Techniques for High-Resolution Continuous-Time Delta-Sigma Converters With Low In-Band Noise Spectral Density. 2429-2442 2020 55 IEEE J. Solid State Circuits 9 https://doi.org/10.1109/JSSC.2020.2979454 db/journals/jssc/jssc55.html#TheerthamKBP20

Sujith Billa Suhas Dixit Shanthi Pavan Analysis and Design of an Audio Continuous-Time 1-X FIR-MASH Delta-Sigma Modulator. 2649-2659 2020 55 IEEE J. Solid State Circuits 10 https://doi.org/10.1109/JSSC.2020.2992891 db/journals/jssc/jssc55.html#BillaDP20

Saravana Manivannan Shanthi Pavan Improved Continuous-Time Delta-Sigma Modulators With Embedded Active Filtering. 3778-3789 2020 67-I IEEE Trans. Circuits Syst. 11 https://doi.org/10.1109/TCSI.2020.3013006 db/journals/tcas/tcasI67.html#ManivannanP20

Alok Baluni Shanthi Pavan A 20 MHz Bandwidth Continuous-Time Delta-Sigma ADC Achieving 82.1 dB SNDR and > 00 dB SFDR Using a Time-Interleaved Virtual-Ground-Switched FIR Feedback DAC. 1-4 2020 CICC https://doi.org/10.1109/CICC48029.2020.9075946 conf/cicc/2020 db/conf/cicc/cicc2020.html#BaluniP20 Raviteja Theertham Shanthi Pavan Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators. 1 2020 ISCAS https://doi.org/10.1109/ISCAS45731.2020.9180763 conf/iscas/2020 db/conf/iscas/iscas2020.html#TheerthamP20 Hajime Shibata Gerry Taylor Bob Schell Victor Kozlov Sharvil Patil Donald Paterson Asha Ganesan Yunzhi Dong Wenhua Yang 0002 Yue Yin Zhao Li Prawal Shrestha Athreya Gopal Aathreya S. Bhat Shanthi Pavan 16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter. 260-262 2020 ISSCC https://doi.org/10.1109/ISSCC19947.2020.9062917 conf/isscc/2020 db/conf/isscc/isscc2020.html#ShibataTSKPPGDY20

Sundeep Javvaji Vipul Singhal 0001 Vinod Menezes Rajat Chauhan Shanthi Pavan Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting. 2590-2600 2019 54 IEEE J. Solid State Circuits 9 https://doi.org/10.1109/JSSC.2019.2917158 https://www.wikidata.org/entity/Q127637447 db/journals/jssc/jssc54.html#JavvajiSMCP19

Shanthi Pavan An Alternative Approach to Bode's Noise Theorem. 738-742 2019 66-II IEEE Trans. Circuits Syst. II Express Briefs 5 https://doi.org/10.1109/TCSII.2019.2907860 https://www.wikidata.org/entity/Q128135041 db/journals/tcas/tcasII66.html#Pavan19

Raviteja Theertham Shanthi Pavan Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators. 2831-2842 2019 66-I IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2019.2907167 https://www.wikidata.org/entity/Q127989274 db/journals/tcas/tcasI66.html#TheerthamP19

Kishalay Datta Vinod Menezes Shanthi Pavan Analysis and Design of Cyclic Switched-Capacitor DC-DC Converters. 3227-3237 2019 66-I IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2019.2907309 db/journals/tcas/tcasI66.html#DattaMP19

Shanthi Pavan Raviteja Theertham Improved Offline Calibration of DAC Mismatch Errors in Delta-Sigma Data Converters. 1618-1622 2019 66-II IEEE Trans. Circuits Syst. II Express Briefs 10 https://doi.org/10.1109/TCSII.2019.2921777 db/journals/tcas/tcasII66.html#PavanT19

Sujith Billa Suhas Dixit Shanthi Pavan A 265μW Continuous-Time 1-2 MASH ADC Achieving 100.6 dB SNDR in a 24 kHz Bandwidth. 123-124 2019 A-SSCC https://doi.org/10.1109/A-SSCC47793.2019.9056938 conf/asscc/2019 db/conf/asscc/asscc2019.html#BillaDP19 Saravana Manivannan Shanthi Pavan Degradation of Alias Rejection in Continuous-Time Bandpass Delta-Sigma Converters due to Weak Loop Filter Nonlinearities. 1-5 2019 ISCAS https://doi.org/10.1109/ISCAS.2019.8702763 conf/iscas/2019 db/conf/iscas/iscas2019.html#ManivannanP19 Shanthi Pavan Simplified Analysis of Total Integrated Noise in Passive Switched-Capacitor and N-Path Filters. 1-5 2019 ISCAS https://doi.org/10.1109/ISCAS.2019.8702129 conf/iscas/2019 db/conf/iscas/iscas2019.html#Pavan19 Raviteja Theertham Prasanth Koottala Sujith Billa Shanthi Pavan A 24mW Chopped CTDSM Achieving 103.5dB SNDR and 107.5dB DR in a 250kHz Bandwidth. 226- 2019 VLSI Circuits https://doi.org/10.23919/VLSIC.2019.8778026 conf/vlsic/2019 db/conf/vlsic/vlsic2019.html#TheerthamKBP19

Ankesh Jain Shanthi Pavan Continuous-Time Delta-Sigma Modulators With Time-Interleaved FIR Feedback. 434-443 2018 65-I IEEE Trans. Circuits Syst. I Regul. Pap. 2 https://doi.org/10.1109/TCSI.2017.2740287 db/journals/tcas/tcasI65.html#JainP18

Shanthi Pavan Improved Chopping in Continuous-Time Delta-Sigma Converters Using FIR Feedback and N-Path Techniques. 552-556 2018 65-II IEEE Trans. Circuits Syst. II Express Briefs 5 https://doi.org/10.1109/TCSII.2018.2820017 db/journals/tcas/tcasII65.html#Pavan18

Shanthi Pavan Eric A. M. Klumperink Analysis of the Effect of Source Capacitance and Inductance on $N$ -Path Mixers and Filters. 1469-1480 2018 65-I IEEE Trans. Circuits Syst. I Regul. Pap. 5 https://doi.org/10.1109/TCSI.2017.2754342 db/journals/tcas/tcasI65.html#PavanK18

Saravana Manivannan Shanthi Pavan Degradation of Alias Rejection in Continuous-Time Delta-Sigma Modulators by Weak Loop-Filter Nonlinearities. 3207-3215 2018 65-I IEEE Trans. Circuits Syst. I Regul. Pap. 10 https://doi.org/10.1109/TCSI.2018.2826443 db/journals/tcas/tcasI65.html#ManivannanP18

Shanthi Pavan Eric A. M. Klumperink Generalized Analysis of High-Order Switch-RC N-Path Mixers/Filters Using the Adjoint Network. 3267-3278 2018 65-I IEEE Trans. Circuits Syst. I Regul. Pap. 10 https://doi.org/10.1109/TCSI.2018.2816342 db/journals/tcas/tcasI65.html#PavanK18a

Saravana Manivannan Shanthi Pavan A 1 MHz bandwidth, filtering continuous-time delta-sigma ADC with 36 dBFS out-of-band IIP3 and 76 dB SNDR. 1-4 2018 CICC https://doi.org/10.1109/CICC.2018.8357089 conf/cicc/2018 db/conf/cicc/cicc2018.html#ManivannanP18 Shanthi Pavan Finite-impulse-response (FIR) feedback in continuous-time delta-sigma converters. 1-8 2018 CICC https://doi.org/10.1109/CICC.2018.8357084 conf/cicc/2018 db/conf/cicc/cicc2018.html#Pavan18 Shanthi Pavan Practical design and simulation techniques for continuous-time ΔΣ converters. 1-81 2018 CICC https://doi.org/10.1109/CICC.2018.8357104 conf/cicc/2018 db/conf/cicc/cicc2018.html#Pavan18a Sundeep Javvaji Vipul Singhal 0001 Vinod Menezes Rajat Chauhan Shanthi Pavan Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting. 42-45 2018 ESSCIRC https://doi.org/10.1109/ESSCIRC.2018.8494272 conf/esscirc/2018 db/conf/esscirc/esscirc2018.html#JavvajiSMCP18 Shanthi Pavan Siddharth Baskaran What Architecture Should I Choose for my Continuous-Time Delta-Sigma Modulator? 5- 2018 ISCAS https://doi.org/10.1109/ISCAS.2018.8351141 conf/iscas/2018 db/conf/iscas/iscas2018.html#PavanB18

Neha Sinha Mansour Rachid Shanthi Pavan Sudhakar Pamarti Design and Analysis of an 8 mW, 1 GHz Span, Passive Spectrum Scanner With >+31 dBm Out-of-Band IIP3 Using Periodically Time-Varying Circuit Components. 2009-2025 2017 52 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.2017.2697412 db/journals/jssc/jssc52.html#SinhaRPP17

Sujith Billa Amrith Sukumaran Shanthi Pavan Analysis and Design of Continuous-Time Delta-Sigma Converters Incorporating Chopping. 2350-2361 2017 52 IEEE J. Solid State Circuits 9 https://doi.org/10.1109/JSSC.2017.2717937 db/journals/jssc/jssc52.html#BillaSP17

Hajime Shibata Victor Kozlov Zexi Ji Asha Ganesan Haiyang Zhu Donald Paterson Jialin Zhao 0001 Sharvil Patil Shanthi Pavan A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving -164-dBFS/Hz NSD. 3219-3234 2017 52 IEEE J. Solid State Circuits 12 https://doi.org/10.1109/JSSC.2017.2747128 db/journals/jssc/jssc52.html#ShibataKJGZPZPP17

Shanthi Pavan Analysis of Chopped Integrators, and Its Application to Continuous-Time Delta-Sigma Modulator Design. 1953-1965 2017 64-I IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2017.2682884 db/journals/tcas/tcasI64.html#Pavan17

Shanthi Pavan Eric A. M. Klumperink Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network. 2714-2725 2017 64-I IEEE Trans. Circuits Syst. I Regul. Pap. 10 https://doi.org/10.1109/TCSI.2017.2703579 db/journals/tcas/tcasI64.html#PavanK17

Shanthi Pavan On linear periodically time varying (LPTV) systems with modulated inputs, and their application to smoothing filters. 1-4 2017 ISCAS https://doi.org/10.1109/ISCAS.2017.8050952 conf/iscas/2017 db/conf/iscas/iscas2017.html#Pavan17

Amrith Sukumaran Shanthi Pavan Design of Continuous-Time ΔΣ Modulators With Dual Switched-Capacitor Return-to-Zero DACs. 1619-1629 2016 51 IEEE J. Solid State Circuits 7 https://doi.org/10.1109/JSSC.2016.2542200 db/journals/jssc/jssc51.html#SukumaranP16

Shanthi Pavan Continuous-time ΔΣ modulators with dual switched capacitor resistor DACs. 69-72 2016 ISCAS https://doi.org/10.1109/ISCAS.2016.7527172 conf/iscas/2016 db/conf/iscas/iscas2016.html#Pavan16 Sujith Billa Amrith Sukumaran Shanthi Pavan 15.4 A 280µW 24kHz-BW 98.5dB-SNDR chopped single-bit CT ΔΣM achieving <10Hz 1/f noise corner without chopping artifacts. 276-277 2016 ISSCC https://doi.org/10.1109/ISSCC.2016.7418014 conf/isscc/2016 db/conf/isscc/isscc2016.html#BillaSP16 Ankesh Jain Shanthi Pavan A 13.3 mW 60 MHz bandwidth, 76 dB DR 6 GS/s CTΔΣM with time interleaved FIR feedback. 1-2 2016 VLSI Circuits https://doi.org/10.1109/VLSIC.2016.7573466 conf/vlsic/2016 db/conf/vlsic/vlsic2016.html#JainP16 Shanthi Pavan Nagendra Krishnapura Demystifying Time Varying Circuits and Systems. 17-18 2016 VLSID https://doi.org/10.1109/VLSID.2016.135 https://doi.ieeecomputersociety.org/10.1109/VLSID.2016.135 conf/vlsid/2016 db/conf/vlsid/vlsid2016.html#PavanK16 Kamlesh Singh Shanthi Pavan A 14 Bit Dual Channel Incremental Continuous-Time Delta Sigma Modulator for Multiplexed Data Acquisition. 230-235 2016 VLSID https://doi.org/10.1109/VLSID.2016.21 https://doi.ieeecomputersociety.org/10.1109/VLSID.2016.21 conf/vlsid/2016 db/conf/vlsid/vlsid2016.html#SinghP16

José M. de la Rosa 0001 Richard Schreier Kong-Pang Pun Shanthi Pavan Guest Editorial: Next-Generation Delta-Sigma Converters. 481-483 2015 5 IEEE J. Emerg. Sel. Topics Circuits Syst. 4 https://doi.org/10.1109/JETCAS.2015.2500966 db/journals/esticas/esticas5.html#RosaSPP15

José M. de la Rosa 0001 Richard Schreier Kong-Pang Pun Shanthi Pavan Next-Generation Delta-Sigma Converters: Trends and Perspectives. 484-499 2015 5 IEEE J. Emerg. Sel. Topics Circuits Syst. 4 https://doi.org/10.1109/JETCAS.2015.2502164 db/journals/esticas/esticas5.html#RosaSPP15a

Shanthi Pavan Outgoing Editorial. 2793-2794 2015 62-I IEEE Trans. Circuits Syst. I Regul. Pap. 12 https://doi.org/10.1109/TCSI.2015.2503138 db/journals/tcas/tcasI62.html#Pavan15

Amrith Sukumaran Shanthi Pavan A continuous-time ΔΣ modulator with 91dB dynamic range in a 2 MHz signal bandwidth using a dual switched-capacitor return-to-zero DAC. 217-220 2015 ESSCIRC https://doi.org/10.1109/ESSCIRC.2015.7313866 conf/esscirc/2015 db/conf/esscirc/esscirc2015.html#SukumaranP15 Naga Rajesh Shanthi Pavan Programmable analog pulse shaping for ultra-wideband applications. 461-464 2015 ISCAS https://doi.org/10.1109/ISCAS.2015.7168670 conf/iscas/2015 db/conf/iscas/iscas2015.html#RajeshP15 Sandeep Krishnan Shanthi Pavan A 10 Gbps eye opening monitor in 65nm CMOS. 3028-3031 2015 ISCAS https://doi.org/10.1109/ISCAS.2015.7169325 conf/iscas/2015 db/conf/iscas/iscas2015.html#KrishnanP15

Naga Rajesh Shanthi Pavan Design of Lumped-Component Programmable Delay Elements for Ultra-Wideband Beamforming. 1800-1814 2014 49 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.2014.2317132 db/journals/jssc/jssc49.html#RajeshP14

Radha S. Rajan Shanthi Pavan Design Techniques for Continuous-Time ΔΣ Modulators With Embedded Active Filtering. 2187-2198 2014 49 IEEE J. Solid State Circuits 10 https://doi.org/10.1109/JSSC.2014.2345023 db/journals/jssc/jssc49.html#RajanP14

Amrith Sukumaran Shanthi Pavan Low Power Design Techniques for Single-Bit Audio Continuous-Time Delta Sigma ADCs Using FIR Feedback. 2515-2525 2014 49 IEEE J. Solid State Circuits 11 https://doi.org/10.1109/JSSC.2014.2332885 db/journals/jssc/jssc49.html#SukumaranP14

Shanthi Pavan Incoming Editorial. 1 2014 61-I IEEE Trans. Circuits Syst. I Regul. Pap. 1 https://doi.org/10.1109/TCSI.2013.2296393 db/journals/tcas/tcasI61.html#Pavan14

Yong Lian 0001 Sergios Theodoridis George Yuan Shanthi Pavan Guest Editorial Special Section on the 2013 IEEE International Symposium on Circuits and Systems (ISCAS 2013). 1301-1303 2014 61-I IEEE Trans. Circuits Syst. I Regul. Pap. 5 https://doi.org/10.1109/TCSI.2014.2313895 db/journals/tcas/tcasI61.html#LianTYP14

Ankesh Jain Shanthi Pavan Characterization Techniques for High Speed Oversampled Data Converters. 1313-1320 2014 61-I IEEE Trans. Circuits Syst. I Regul. Pap. 5 https://doi.org/10.1109/TCSI.2014.2309895 db/journals/tcas/tcasI61.html#JainP14

Shanthi Pavan Continuous-Time Delta-Sigma Modulator Design Using the Method of Moments. 1629-1637 2014 61-I IEEE Trans. Circuits Syst. I Regul. Pap. 6 https://doi.org/10.1109/TCSI.2013.2290846 db/journals/tcas/tcasI61.html#Pavan14a

Shanthi Pavan Radha S. Rajan Simplified Analysis and Simulation of the STF, NTF, and Noise in Continuous-Time ΔΣ Modulators. 681-685 2014 61-II IEEE Trans. Circuits Syst. II Express Briefs 9 https://doi.org/10.1109/TCSII.2014.2335414 db/journals/tcas/tcasII61.html#PavanR14

Shanthi Pavan Radha S. Rajan Interreciprocity in Linear Periodically Time-Varying Networks With Sampled Outputs. 686-690 2014 61-II IEEE Trans. Circuits Syst. II Express Briefs 9 https://doi.org/10.1109/TCSII.2014.2335393 db/journals/tcas/tcasII61.html#PavanR14a

Shanthi Pavan Efficient estimation of noise and signal transfer functions of a continuous-time ΣΔ modulator. 726-729 2014 ISCAS https://doi.org/10.1109/ISCAS.2014.6865238 conf/iscas/2014 db/conf/iscas/iscas2014.html#Pavan14 Radha S. Rajan Shanthi Pavan 29.1 A 5mW CT ΔΣ ADC with embedded 2nd-order active filter and VGA achieving 82dB DR in 2MHz BW. 478-479 2014 ISSCC https://doi.org/10.1109/ISSCC.2014.6757520 conf/isscc/2014 db/conf/isscc/isscc2014.html#RajanP14

Timir Nandi Karthikeya Boominathan Shanthi Pavan Continuous-Time ΔΣ Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC. 1795-1805 2013 48 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.2013.2259012 db/journals/jssc/jssc48.html#NandiBP13

Shanthi Pavan A Time-Domain Perspective of the Signal Transfer Function of a Continuous-Time ΔΣ Modulator. 81-85 2013 60-II IEEE Trans. Circuits Syst. II Express Briefs 2 https://doi.org/10.1109/TCSII.2012.2235016 db/journals/tcas/tcasII60.html#Pavan13

Shanthi Pavan Wouter A. Serdijn Henry Shu-Hung Chung Ming-Der Shieh Young Hwan Kim Guest Editorial Special Section on the 2012 IEEE International Symposium on Circuits and Systems (ISCAS 2012). 1101-1103 2013 60-I IEEE Trans. Circuits Syst. I Regul. Pap. 5 https://doi.org/10.1109/TCSI.2013.2258101 https://www.wikidata.org/entity/Q62665684 db/journals/tcas/tcasI60.html#PavanSCSK13

Shanthi Pavan John W. M. Rogers Vikas Chandra Guest Editorial: Special Section on the 2012 IEEE Custom Integrated Circuits Conference (CICC 2012). 1977-1978 2013 60-I IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2013.2272114 db/journals/tcas/tcasI60.html#PavanRC13

Naga Rajesh Shanthi Pavan A lumped component programmable delay element for Ultra-Wideband beamforming. 1-4 2013 CICC https://doi.org/10.1109/CICC.2013.6658475 conf/cicc/2013 db/conf/cicc/cicc2013.html#RajeshP13 Ankesh Jain Shanthi Pavan Improved characterization of high speed continuous-time ΔΣ modulators using a duobinary test interface. 1252-1255 2013 ISCAS https://doi.org/10.1109/ISCAS.2013.6572080 conf/iscas/2013 db/conf/iscas/iscas2013.html#JainP13

Ankesh Jain Muthusubramaniam Venkatesan Shanthi Pavan Analysis and Design of a High Speed Continuous-time ΔΣ Modulator Using the Assisted Opamp Technique. 1615-1625 2012 47 IEEE J. Solid State Circuits 7 https://doi.org/10.1109/JSSC.2012.2191210 db/journals/jssc/jssc47.html#JainVP12

Vikas Singh Nagendra Krishnapura Shanthi Pavan Baradwaj Vigraham Debasish Behera Nimit Nigania A 16 MHz BW 75 dB DR CT ΔΣ ADC Compensated for More Than One Cycle Excess Loop Delay. 1884-1895 2012 47 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.2012.2196730 db/journals/jssc/jssc47.html#SinghKPVBN12

Pradeep Shettigar Shanthi Pavan Design Techniques for Wideband Single-Bit Continuous-Time Delta Sigma Modulators With FIR Feedback DACs. 2865-2879 2012 47 IEEE J. Solid State Circuits 12 https://doi.org/10.1109/JSSC.2012.2217871 db/journals/jssc/jssc47.html#ShettigarP12

Chip-Hong Chang Howard C. Luong Shanthi Pavan Guest Editorial Special Section on the 2011 IEEE Custom Integrated Circuits Conference (CICC 2011). 1601-1603 2012 59-I IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2012.2206495 db/journals/tcas/tcasI59.html#ChangLP12

Radha S. Rajan Shanthi Pavan Device Noise in Continuous-Time Oversampling Converters. 1829-1840 2012 59-I IEEE Trans. Circuits Syst. I Regul. Pap. 9 https://doi.org/10.1109/TCSI.2011.2180445 db/journals/tcas/tcasI59.html#RajanP12

Timir Nandi Karthikeya Boominathan Shanthi Pavan A continuous-time ΔΣ modulator with 87 dB dynamic range in a 2MHz signal bandwidth using a Switched-Capacitor Return-to-Zero DAC. 1-4 2012 CICC https://doi.org/10.1109/CICC.2012.6330692 conf/cicc/2012 db/conf/cicc/cicc2012.html#NandiBP12 Radha S. Rajan Shanthi Pavan Device noise in continuous-time ΔΣ modulators with Switched-Capacitor feedback DACs. 524-527 2012 ISCAS https://doi.org/10.1109/ISCAS.2012.6272081 conf/iscas/2012 db/conf/iscas/iscas2012.html#RajanP12 Pradeep Shettigar Shanthi Pavan A 15mW 3.6GS/s CT-ΔΣ ADC with 36MHz bandwidth and 83dB DR in 90nm CMOS. 156-158 2012 ISSCC https://doi.org/10.1109/ISSCC.2012.6176957 conf/isscc/2012 db/conf/isscc/isscc2012.html#ShettigarP12 Un-Ku Moon Shanthi Pavan Little-known features of well-known creatures. 511 2012 ISSCC https://doi.org/10.1109/ISSCC.2012.6177106 conf/isscc/2012 db/conf/isscc/isscc2012.html#MoonP12

Siva V. Thyagarajan Shanthi Pavan Prabu Sankar Active-RC Filters Using the Gm-Assisted OTA-RC Technique. 1522-1533 2011 46 IEEE J. Solid State Circuits 7 https://doi.org/10.1109/JSSC.2011.2143590 db/journals/jssc/jssc46.html#ThyagarajanPS11

Shanthi Pavan Alias Rejection of Continuous-Time DeltaSigma Modulators With Switched-Capacitor Feedback DACs. 233-243 2011 58-I IEEE Trans. Circuits Syst. I Regul. Pap. 2 https://doi.org/10.1109/TCSI.2010.2071930 db/journals/tcas/tcasI58.html#Pavan11

Shanthi Pavan On Continuous-Time DeltaSigma Modulators With Return-to-Open DACs. 284-288 2011 58-II IEEE Trans. Circuits Syst. II Express Briefs 5 https://doi.org/10.1109/TCSII.2011.2124930 db/journals/tcas/tcasII58.html#Pavan11a

Vikas Singh Nagendra Krishnapura Shanthi Pavan Baradwaj Vigraham Nimit Nigania Debasish Behera A 16MHz BW 75dB DR CT ΔΣ ADC compensated for more than one cycle excess loop delay. 1-4 2011 CICC https://doi.org/10.1109/CICC.2011.6055291 conf/cicc/2011 db/conf/cicc/cicc2011.html#SinghKPVNB11 Ankesh Jain Muthusubramanian Venkateswaran Shanthi Pavan A 4mW 1 GS/s continuous-time ΔΣ modulator with 15.6MHz bandwidth and 67 dB dynamic range. 259-262 2011 ESSCIRC https://doi.org/10.1109/ESSCIRC.2011.6044956 conf/esscirc/2011 db/conf/esscirc/esscirc2011.html#JainVP11 Shanthi Pavan The inconvenient truth about alias rejection in continuous time ΔΣ converters. 526-529 2011 ISCAS https://doi.org/10.1109/ISCAS.2011.5937618 conf/iscas/2011 db/conf/iscas/iscas2011.html#Pavan11

Shanthi Pavan Prabu Sankar Power Reduction in Continuous-Time Delta-Sigma Modulators Using the Assisted Opamp Technique. 1365-1379 2010 45 IEEE J. Solid State Circuits 7 https://doi.org/10.1109/JSSC.2010.2048082 db/journals/jssc/jssc45.html#PavanS10

Shanthi Pavan Systematic Design Centering of Continuous Time Oversampling Converters. 158-162 2010 57-II IEEE Trans. Circuits Syst. II Express Briefs 3 https://doi.org/10.1109/TCSII.2010.2041814 db/journals/tcas/tcasII57.html#Pavan10a

Shanthi Pavan Efficient Simulation of Weak Nonlinearities in Continuous-Time Oversampling Converters. 1925-1934 2010 57-I IEEE Trans. Circuits Syst. I Regul. Pap. 8 https://doi.org/10.1109/TCSI.2009.2039833 db/journals/tcas/tcasI57.html#Pavan10

Vikas Singh Nagendra Krishnapura Shanthi Pavan Compensating for Quantizer Delay in Excess of One Clock Cycle in Continuous-Time DeltaSigma Modulators. 676-680 2010 57-II IEEE Trans. Circuits Syst. II Express Briefs 9 https://doi.org/10.1109/TCSII.2010.2058496 db/journals/tcas/tcasII57.html#SinghKP10

Siva V. Thyagarajan Shanthi Pavan Prabu Sankar Low distortion active filters using the Gm-assisted OTA-RC technique. 162-165 2010 ESSCIRC https://doi.org/10.1109/ESSCIRC.2010.5619904 conf/esscirc/2010 db/conf/esscirc/esscirc2010.html#ThyagarajanPS10 Shanthi Pavan Understanding weak loop filter nonlinearities in continuous time ΔΣ converters. 17-20 2010 ISCAS https://doi.org/10.1109/ISCAS.2010.5537136 conf/iscas/2010 db/conf/iscas/iscas2010.html#Pavan10

Tonse Laxminidhi Venkata Prasadu Shanthi Pavan Widely Programmable High-Frequency Active RC Filters in CMOS Technology. 327-336 2009 56-I IEEE Trans. Circuits Syst. I Regul. Pap. 2 https://doi.org/10.1109/TCSI.2008.2001759 db/journals/tcas/tcasI56.html#LaxminidhiPP09

Shanthi Pavan Prabu Sankar A 110µW single bit audio continuous-time oversampled converter with 92.5 db dynamic range. 320-323 2009 ESSCIRC https://doi.org/10.1109/ESSCIRC.2009.5325953 conf/esscirc/2009 db/conf/esscirc/esscirc2009.html#PavanS09 Yogesh Darwhekar Rakesh Kumar Debapriya Sahu Shanthi Pavan Ashish Lachhwani T. Krishnaswamy Subhashish Mukherjee A Digitally Assisted Baseband Filter with 9MHz Bandwidth and 0.3 dB IQ Mismatch for a WLAN Receiver Chain. 261-264 2009 ISCAS https://doi.org/10.1109/ISCAS.2009.5117735 conf/iscas/2009 db/conf/iscas/iscas2009.html#DarwhekarKSPLKM09 Saurabh Saxena Prabu Sankar Shanthi Pavan Automatic Tuning of Time Constants in Single Bit Continuous-time Delta-sigma Modulators. 2257-2260 2009 ISCAS https://doi.org/10.1109/ISCAS.2009.5118248 conf/iscas/2009 db/conf/iscas/iscas2009.html#SaxenaSP09 Nagendra Krishnapura Shanthi Pavan Negative Feedback System and Circuit Design. 35-36 2009 VLSI Design https://doi.org/10.1109/VLSI.Design.2009.116 https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.116 conf/vlsid/2009 db/conf/vlsid/vlsid2009.html#KrishnapuraP09

Shanthi Pavan Nagendra Krishnapura Ramalingam Pandarinathan Prabu Sankar A Power Optimized Continuous-Time ΔΣ ADC for Audio Applications. 351-360 2008 43 IEEE J. Solid State Circuits 2 https://doi.org/10.1109/JSSC.2007.914263 db/journals/jssc/jssc43.html#PavanKPS08

Shanthi Pavan Power and Area-Efficient Adaptive Equalization at Microwave Frequencies. 1412-1420 2008 55-I IEEE Trans. Circuits Syst. I Regul. Pap. 6 https://doi.org/10.1109/TCSI.2008.918149 db/journals/tcas/tcasI55.html#Pavan08a

Shanthi Pavan Excess Loop Delay Compensation in Continuous-Time Delta-Sigma Modulators. 1119-1123 2008 55-II IEEE Trans. Circuits Syst. II Express Briefs 11 https://doi.org/10.1109/TCSII.2008.2008051 db/journals/tcas/tcasII55.html#Pavan08

Karthikeyan Reddy Shanthi Pavan A 20.7mW continuous-time ΔΣ modulator with 15MHz bandwidth and 70 dB dynamic range. 210-213 2008 ESSCIRC https://doi.org/10.1109/ESSCIRC.2008.4681829 conf/esscirc/2008 db/conf/esscirc/esscirc2008.html#ReddyP08 Shanthi Pavan Power and area efficient high speed analog adaptive equalization. 3126-3129 2008 ISCAS https://doi.org/10.1109/ISCAS.2008.4542120 conf/iscas/2008 db/conf/iscas/iscas2008.html#Pavan08 Shanthi Pavan Nagendra Krishnapura Oversampling Analog-to-Digital Converter Design. 7 2008 VLSI Design https://doi.org/10.1109/VLSI.2008.130 https://doi.ieeecomputersociety.org/10.1109/VLSI.2008.130 conf/vlsid/2008 db/conf/vlsid/vlsid2008.html#PavanK08

Shanthi Pavan Tonse Laxminidhi Accurate Characterization of Integrated Continuous-Time Filters. 1758-1766 2007 42 IEEE J. Solid State Circuits 8 https://doi.org/10.1109/JSSC.2007.900288 db/journals/jssc/jssc42.html#PavanL07

Shanthi Pavan Rajesh Tiruvuru Analysis and Design of Singly Terminated Transmission-Line FIR Adaptive Equalizers. 401-410 2007 54-I IEEE Trans. Circuits Syst. I Regul. Pap. 2 https://doi.org/10.1109/TCSI.2006.887475 db/journals/tcas/tcasI54.html#PavanT07

Shanthi Pavan Nagendra Krishnapura Automatic Tuning of Time Constants in Continuous-Time Delta-Sigma Modulators. 308-312 2007 54-II IEEE Trans. Circuits Syst. II Express Briefs 4 https://doi.org/10.1109/TCSII.2006.888920 db/journals/tcas/tcasII54.html#PavanK07

Tonse Laxminidhi Shanthi Pavan Efficient Design Centering of High-Frequency Integrated Continuous-Time Filters. 1481-1488 2007 54-I IEEE Trans. Circuits Syst. I Regul. Pap. 7 https://doi.org/10.1109/TCSI.2007.899625 db/journals/tcas/tcasI54.html#LaxminidhiP07

Karthikeyan Reddy Shanthi Pavan Fundamental Limitations of Continuous-Time Delta-Sigma Modulators Due to Clock Jitter. 2184-2194 2007 54-I IEEE Trans. Circuits Syst. I Regul. Pap. 10 https://doi.org/10.1109/TCSI.2007.905648 db/journals/tcas/tcasI54.html#ReddyP07

Prabu Sankar Shanthi Pavan Analysis of Integrator Nonlinearity in a Class of Continuous-Time Delta-Sigma Modulators. 1125-1129 2007 54-II IEEE Trans. Circuits Syst. II Express Briefs 12 https://doi.org/10.1109/TCSII.2007.905390 db/journals/tcas/tcasII54.html#SankarP07

Tonse Laxminidhi Venkata Prasadu Shanthi Pavan A low power 44-300 MHz programmable active-RC filter in 0.18 μm CMOS. 683-686 2007 CICC https://doi.org/10.1109/CICC.2007.4405824 conf/cicc/2007 db/conf/cicc/cicc2007.html#LaxminidhiPP07 Shanthi Pavan Nagendra Krishnapura Ramalingam Pandarinathan Prabu Sankar A 90μW 15-bit ΔΣ ADC for digital audio. 198-201 2007 ESSCIRC https://doi.org/10.1109/ESSCIRC.2007.4430279 conf/esscirc/2007 db/conf/esscirc/esscirc2007.html#PavanKPS07 Tonse Laxminidhi Shanthi Pavan Design Centering High Frequency Integrated Continuous-Time Filters. 1939-1942 2007 conf/iscas/2007 ISCAS https://doi.org/10.1109/ISCAS.2007.378355 db/conf/iscas/iscas2007.html#LaxminidhiP07 Shanthi Pavan Singly Terminated & Bi-Transversal Transmission Line Filters for High Speed Adaptive Equalization. 3550-3553 2007 conf/iscas/2007 ISCAS https://doi.org/10.1109/ISCAS.2007.378449 db/conf/iscas/iscas2007.html#Pavan07

Venkata Srinivas Shanthi Pavan Ashish Lachhwani Naga Sasidhar A Distortion Compensating Flash Analog-to-Digital Conversion Technique. 1959-1969 2006 41 IEEE J. Solid State Circuits 9 https://doi.org/10.1109/JSSC.2006.880601 db/journals/jssc/jssc41.html#SrinivasPLS06

Shanthi Pavan Shankar Shivappa Nonidealities in traveling wave and transversal FIR filters operating at microwave frequencies. 177-192 2006 53-I IEEE Trans. Circuits Syst. I Regul. Pap. 1 https://doi.org/10.1109/TCSI.2005.854610 db/journals/tcas/tcasI53.html#PavanS06

Shanthi Pavan Tonse Laxminidhi A Technique for Accurate Frequency Response Measurement of Integrated Continuous-Time Filters. 77-80 2006 CICC https://doi.org/10.1109/CICC.2006.320980 conf/cicc/2006 db/conf/cicc/cicc2006.html#PavanL06 Murali Shanmugasundaram Shanthi Pavan Rapid Simulation of Current Steering Digital-to-Analog Converters using Verilog-A. 201-204 2006 CICC https://doi.org/10.1109/CICC.2006.320910 conf/cicc/2006 db/conf/cicc/cicc2006.html#Shanmugasundaram06 Karthikeyan Reddy Shanthi Pavan Fundamental limitations of continuous-time delta-sigma modulators due to clock jitter. 2006 conf/iscas/2006 ISCAS https://doi.org/10.1109/ISCAS.2006.1693011 db/conf/iscas/iscas2006.html#ReddyP06 Rajesh Tiruvuru Shanthi Pavan Transmission line based FIR structures for high speed adaptive equalization. 2006 conf/iscas/2006 ISCAS https://doi.org/10.1109/ISCAS.2006.1692769 db/conf/iscas/iscas2006.html#TiruvuruP06 Shanthi Pavan Prakash Easwaran C. Srinivasan System Aspects of Analog to Digital Converter Designs. 10 2006 conf/vlsid/2006 VLSI Design https://doi.org/10.1109/VLSID.2006.154 https://doi.ieeecomputersociety.org/10.1109/VLSID.2006.154 db/conf/vlsid/vlsid2006.html#PavanES06 Shanthi Pavan Shankar Shivappa Analysis of traveling wave and transversal analog adaptive equalizers. 5962-5965 2005 conf/iscas/2005 ISCAS (6) https://doi.org/10.1109/ISCAS.2005.1465997 db/conf/iscas/iscas2005-6.html#PavanS05

Shanthi Pavan Continuous-time integrated FIR filters at microwave frequencies. 15-20 2004 51-II IEEE Trans. Circuits Syst. II Express Briefs 1 https://doi.org/10.1109/TCSII.2003.821522 db/journals/tcas/tcasII51.html#Pavan04

Shanthi Pavan A fixed transconductance bias technique for CMOS analog integrated circuits. 661-664 2004 conf/iscas/2004 ISCAS (1) https://doi.org/10.1109/ISCAS.2004.1328281 db/conf/iscas/iscas2004-1.html#Pavan04 Gennady Feygin Krishnaswamy Nagaraj Ranjan Chattopadhyay R. Herrera I. Papantonopoulos David A. Martin P. Wu Shanthi Pavan A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation. 153-156 2001 CICC https://doi.org/10.1109/CICC.2001.929745 conf/cicc/2001 db/conf/cicc/cicc2001.html#FeyginNCHPMWP01

Shanthi Pavan Yannis P. Tsividis Krishnaswamy Nagaraj Widely programmable high-frequency continuous-time filters in digital CMOS technology. 503-511 2000 35 IEEE J. Solid State Circuits 4 https://doi.org/10.1109/4.839910 db/journals/jssc/jssc35.html#PavanTN00

Krishnaswamy Nagaraj David A. Martin Mark A. Wolfe Ranjan Chattopadhyay Shanthi Pavan Jason Cancio T. R. Viswanathan 0001 A dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit A/D converter in a 0.25-μm digital CMOS process. 1760-1768 2000 35 IEEE J. Solid State Circuits 12 https://doi.org/10.1109/4.890289 db/journals/jssc/jssc35.html#NagarajMWCPCV00

Shanthi Pavan Yannis P. Tsividis Krishnaswamy Nagaraj Modeling of accumulation MOS capacitors for analog design in digital VLSI processes. 202-205 1999 conf/iscas/1999 ISCAS (6) https://doi.org/10.1109/ISCAS.1999.780130 db/conf/iscas/iscas1999-6.html#PavanTN99 Alok Baluni Nishanth Basavaraj Siddharth Baskaran Debasish Behera Aathreya S. Bhat Sujith Billa Karthikeya Boominathan Luis A. Camuñas-Mesa Jason Cancio Vikas Chandra Chip-Hong Chang Ranjan Chattopadhyay Rajat Chauhan Henry S. H. ChungHenry Shu-Hung Chung Yogesh Darwhekar Kishalay Datta Suhas Dixit Yunzhi Dong Prakash Easwaran Gennady Feygin Asha Ganesan Satya Narayana Ganta Sovan Ghosh Athreya Gopal Javad Gorji Tanmay Halder R. Herrera Ankesh Jain Sundeep Javvaji Zexi Ji Lu Jie 0001 Anand Kannan Young Hwan Kim Eric A. M. Klumperink Prasanth Koottala Victor Kozlov Sandeep Krishnan Nagendra Krishnapura T. Krishnaswamy Chaitanya Kumar Rakesh Kumar Ashish Lachhwani Tonse Laxminidhi Zhao Li Yong Lian 0001 Howard C. Luong Saravana Manivannan David A. Martin Vinod Menezes Un-Ku Moon Abhishek Mukherjee Subhashish Mukherjee Udita Mukherjee Krishnaswamy Nagaraj Timir Nandi Nimit Nigania Sudhakar Pamarti Ramalingam Pandarinathan I. Papantonopoulos Donald Paterson Sharvil Patil Venkata Prasadu Kong-Pang Pun Mansour Rachid Radha S. Rajan Naga Rajesh Karthikeyan Reddy John W. M. Rogers José M. de la Rosa 0001 Debapriya Sahu Prabu Sankar Naga Sasidhar Saurabh Saxena Bob Schell Richard Schreier Wouter A. Serdijn Murali Shanmugasundaram Pradeep Shettigar Wei Shi 0011 Hajime Shibata Ming-Der Shieh Shankar Shivappa Prawal Shrestha Kamlesh Singh Vikas Singh Vipul Kumar Singhal 0001Vipul Singhal 0001 Neha Sinha Venkata Srinivas C. Srinivasan Amrith Sukumaran Nan Sun 0001 Xiyuan Tang Gerry Taylor Gabor C. Temes Raviteja Theertham Sergios Theodoridis Siva V. Thyagarajan Rajesh Tiruvuru Yannis P. Tsividis Muthusubramaniam Venkatesan Muthusubramanian Venkateswaran Baradwaj Vigraham T. R. Viswanathan 0001 Xing Wang Mark A. Wolfe P. Wu Wenhua Yang 0002 Yue Yin George Yuan Jialin Zhao 0001 Haiyang Zhu