Real-Time Reconfigurable Processor to Detect Similarities in Compressed Video Using Generalized Hough Transformation.

Eduardo I. Boemo

Sergio Ruben Geninatti Eduardo I. Boemo Real-Time Reconfigurable Processor to Detect Similarities in Compressed Video Using Generalized Hough Transformation. 2932-2946 2020 30 IEEE Trans. Circuits Syst. Video Technol. 9 https://doi.org/10.1109/TCSVT.2019.2934499 db/journals/tcsv/tcsv30.html#GeninattiB20

Juan P. Oliver Federico Favaro Eduardo I. Boemo A Framework to Compare Estimated and Measured Power Consumption on FPGAs. 329-337 2019 15 J. Low Power Electron. 4 https://doi.org/10.1166/jolpe.2019.1622 db/journals/jolpe/jolpe15.html#OliverFB19

Juan P. Oliver Francisco Veirano Diego A. Bouvier Eduardo I. Boemo A Low Cost System for Self Measurements of Power Consumption in Field Programmable Gate Arrays. 1-9 2017 13 J. Low Power Electron. 1 https://doi.org/10.1166/jolpe.2017.1465 db/journals/jolpe/jolpe13.html#OliverVBB17

Javier Hormigo Gabriel Caffarena Juan P. Oliver Eduardo I. Boemo Self-Reconfigurable Constant Multiplier for FPGA. 14:1-14:17 2013 6 ACM Trans. Reconfigurable Technol. Syst. 3 https://doi.org/10.1145/2490830 https://www.wikidata.org/entity/Q130866244 db/journals/trets/trets6.html#HormigoCOB13

Eduardo I. Boemo Juan P. Oliver Gabriel Caffarena Tracking the pipelining-power rule along the FPGA technical literature. 9:1-9:5 2013 FPGAworld https://doi.org/10.1145/2513683.2513692 https://www.wikidata.org/entity/Q130872608 conf/fpgaworld/2013 db/conf/fpgaworld/fpgaworld2013.html#BoemoOC13 David M. Cambre Eduardo I. Boemo Elias Todorovich Arithmetic Operations and Their Energy Consumption in the Nios II Embedded Processor. 151-156 2008 ReConFig https://doi.org/10.1109/ReConFig.2008.37 https://doi.ieeecomputersociety.org/10.1109/ReConFig.2008.37 conf/reconfig/2008 db/conf/reconfig/reconfig2008.html#CambreBT08

Philip Heng Wai Leong Andreas Koch 0001 Eduardo I. Boemo Editorial - Field-programmable logic and applications. 265-266 2007 1 IET Comput. Digit. Tech. 4 https://doi.org/10.1049/iet-cdt:20079015 db/journals/iet-cdt/iet-cdt1.html#LeongKB07

Juan González-Gómez Iván González 0004 Francisco J. Gomez-Arribas Eduardo I. Boemo Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors. 24-29 2006 conf/arc/2006 ARC https://doi.org/10.1007/11802839_4 db/conf/arc/arc2006.html#Gonzalez-GomezGGB06 Elias Todorovich Eduardo I. Boemo A-B Nodes Classification for Power Estimation. 1-6 2006 conf/fpl/2006 FPL https://doi.org/10.1109/FPL.2006.311318 db/conf/fpl/fpl2006.html#TodorovichB06 Juan González-Gómez Eduardo I. Boemo Motion of Minimal Configurations of a Modular Robot: Sinusoidal, Lateral Rolling and Lateral Shift. 667-674 2005 CLAWAR https://doi.org/10.1007/3-540-26415-9_80 conf/clawar/2005 db/conf/clawar/clawar2005.html#Gonzalez-GomezB05 Elias Todorovich Fabian Angarita Javier Valls Eduardo I. Boemo Statistical Power Estimation for FPGA. 515-518 2005 conf/fpl/2005 FPL db/conf/fpl/fpl2005.html#TodorovichAVB05 https://doi.org/10.1109/FPL.2005.1515774 https://doi.ieeecomputersociety.org/10.1109/FPL.2005.1515774 Susana Ortega-Cisneros Juan José Raygoza-Panduro Juan Suardíaz Muro Eduardo I. Boemo Rapid prototyping of a self-timed ALU with FPGAs. 2005 ReConFig https://doi.org/10.1109/RECONFIG.2005.33 https://doi.ieeecomputersociety.org/10.1109/RECONFIG.2005.33 conf/reconfig/2005 db/conf/reconfig/reconfig2005.html#Ortega-CisnerosRMB05 Juan José Raygoza-Panduro Susana Ortega-Cisneros Eduardo I. Boemo FPGA implementation of a synchronous and self-timed neuroprocessor. 2005 ReConFig https://doi.org/10.1109/RECONFIG.2005.17 https://doi.ieeecomputersociety.org/10.1109/RECONFIG.2005.17 conf/reconfig/2005 db/conf/reconfig/reconfig2005.html#Raygoza-PanduroOB05 Sergio López-Buedo Eduardo I. Boemo Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report. 79-86 2004 conf/fpga/2004 FPGA https://doi.org/10.1145/968280.968293 https://www.wikidata.org/entity/Q130959046 db/conf/fpga/fpga2004.html#Lopez-BuedoB04 Elias Todorovich Eduardo I. Boemo Francisco Cardells-Tormo Javier Valls Power analysis and estimation tool integrated with XPOWER. 259 2004 conf/fpga/2004 FPGA https://doi.org/10.1145/968280.968356 db/conf/fpga/fpga2004.html#TodorovichBCV04 Gustavo Sutter 0001 Jean-Pierre Deschamps Gery Bioul Eduardo I. Boemo Power Aware Dividers in FPGA. 574-584 https://doi.org/10.1007/978-3-540-30205-6_59 2004 conf/patmos/2004 PATMOS db/conf/patmos/patmos2004.html#SutterDBB04

C. M. Gonzalez Hilda A. Larrondo C. A. Gayoso Leonardo J. Arnone Eduardo I. Boemo Digital Signal Transmission with Chaotic Encryption: Design and Evaluation of a FPGA Realization http://arxiv.org/abs/cs/0402056 2004 CoRR cs.CR/0402056 db/journals/corr/corr0402.html#cs-CR-0402056

Javier Valls Eduardo I. Boemo Efficient FPGA-implementation of two's complement digit-serial/parallel multipliers. 317-322 2003 50 IEEE Trans. Circuits Syst. II Express Briefs 6 https://doi.org/10.1109/TCSII.2003.811438 db/journals/tcasII/tcasII50.html#VallsB03

Sergio López-Buedo Paula Riviere Pablo Pernas Eduardo I. Boemo Run-Time Reconfiguration to Check Temperature in Custom Computers: An Application of JBits Technology. 162-170 2002 conf/fpl/2002 FPL https://doi.org/10.1007/3-540-46117-5_18 db/conf/fpl/fpl2002.html#Lopez-BuedoRPB02 Elias Todorovich M. Gilabert Gustavo Sutter 0001 Sergio López-Buedo Eduardo I. Boemo A Tool for Activity Estimation in FPGAs. 340-349 2002 conf/fpl/2002 FPL https://doi.org/10.1007/3-540-46117-5_36 db/conf/fpl/fpl2002.html#TodorovichGSLB02 Gustavo Sutter 0001 Elias Todorovich Sergio López-Buedo Eduardo I. Boemo FSM Decomposition for Low Power in FPGA. 350-359 2002 conf/fpl/2002 FPL https://doi.org/10.1007/3-540-46117-5_37 db/conf/fpl/fpl2002.html#SutterTLB02 Gustavo Sutter 0001 Elias Todorovich Sergio López-Buedo Eduardo I. Boemo Low-Power FSMs in FPGA: Encoding Alternatives. 363-370 2002 conf/patmos/2002 PATMOS https://doi.org/10.1007/3-540-45716-X_36 db/conf/patmos/patmos2002.html#SutterTLB02

Sergio López-Buedo Javier Garrido Salas Eduardo I. Boemo Thermal Testing on Reconfigurable Computers. 84-91 2000 17 IEEE Des. Test Comput. 1 https://doi.org/10.1109/54.825679 http://doi.ieeecomputersociety.org/10.1109/54.825679 db/journals/dt/dt17.html#Lopez-BuedoGB00

Marcos Martínez-Peiró Javier Valls T. Sansaloni A. Perez-Pascual Eduardo I. Boemo A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation. 241-244 1999 ICECS https://doi.org/10.1109/ICECS.1999.812268 conf/icecsys/1999 db/conf/icecsys/icecsys1999.html#Martinez-PeiroV99 Javier Valls Trini Sansaloni Marcos Martínez-Peiró Eduardo I. Boemo Fast FPGA-based pipelined digit-serial/parallel multipliers. 482-485 1999 conf/iscas/1999 ISCAS (1) https://doi.org/10.1109/ISCAS.1999.777931 db/conf/iscas/iscas1999-1.html#VallsSPB99

Eduardo I. Boemo Sergio López-Buedo Juan M. Meneses Some experiments about wave pipelining on FPGA's. 232-237 1998 6 IEEE Trans. Very Large Scale Integr. Syst. 2 https://doi.org/10.1109/92.678876 db/journals/tvlsi/tvlsi6.html#BoemoLM98

Javier Valls Marcos M. Peiró Trinidad Sansaloni Eduardo I. Boemo Design and FPGA implementation of digit-serial FIR filters. 191-194 1998 ICECS https://doi.org/10.1109/ICECS.1998.814860 conf/icecsys/1998 db/conf/icecsys/icecsys1998.html#VallsPSB98 Eduardo I. Boemo Sergio López-Buedo Thermal monitoring on FPGAs using ring-oscillators. 69-78 1997 conf/fpl/1997 FPL db/conf/fpl/fpl1997.html#BoemoL97 https://doi.org/10.1007/3-540-63465-7_212 Eduardo I. Boemo Sergio López-Buedo Juan M. Meneses The Wave Pipeline Effect on LUT-Based FPGA Architectures. 45-50 1996 conf/fpga/1996 FPGA https://doi.org/10.1145/228370.228377 db/conf/fpga/fpga96.html#BoemoLM96 Eduardo I. Boemo Guillermo González de Rivera Sergio López-Buedo Juan M. Meneses Some Notes on Power Management on FPGA-Based Systems. 149-157 1995 conf/fpl/1995 FPL db/conf/fpl/fpl1995.html#BoemoRLM95 https://doi.org/10.1007/3-540-60294-1_108 Fabian Angarita Leonardo J. Arnone Gery Bioul Diego A. Bouvier Gabriel Caffarena David M. Cambre Fran CardellsFrancisco Cardells-Tormo Jean-Pierre Deschamps Federico Favaro C. A. Gayoso Sergio Ruben Geninatti M. Gilabert Francisco J. Gomez-Arribas C. M. Gonzalez Iván González 0004 Juan González-Gómez Javier Hormigo Andreas Koch 0001 Hilda A. Larrondo Philip H. W. LeongPhilip Heng Wai Leong Sergio López-Buedo Marcos Martínez-Peiró Juan M. Meneses Juan Suardíaz Muro Juan P. Oliver Susana Ortega-Cisneros Marcos M. Peiró Asuncion Perez-PascualA. Perez-Pascual Pablo Pernas Juan José Raygoza-Panduro Guillermo González de Rivera Paula Riviere Javier Garrido Salas T. SansaloniTrinidad Sansaloni Trini Sansaloni Gustavo Sutter 0001 Elias Todorovich Javier Valls-CoquillatJavier Valls Francisco Veirano