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Hajime Shibata

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Gerry Taylor

> Home > Persons > Hajime Shibata

Publications

2024
[j14]
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  persistent URL:
  - https://dblp.org/rec/journals/jssc/PatilGSKTSLLVTPYC24
Sharvil Patil, Asha Ganesan, Hajime Shibata, Victor Kozlov, Gerry Taylor, Prawal Shrestha, Zhao Li, Sevil Zeynep Lulec, Konstantinos Vasilakopoulos, Raviteja Theertham, Donald Paterson, Qingnan Yu, Aseer Chowdhury:
A -90-dBFS-IM₃, -164-dBFS/Hz-NSD, 700-MHz-Bandwidth Continuous-Time Pipelined ADC With Digital Cancellation of DAC Errors. IEEE J. Solid State Circuits 59(12): 4225-4236 (2024)
[c18]
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  - conf/isscc/PatilGSKTYLLVSPTC24
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Sharvil Patil, Asha Ganesan, Hajime Shibata, Victor Kozlov, Gerry Taylor, Qingnan Yu, Zhao Li, Zeynep Lulec, Konstantinos Vasilakopoulos, Prawal Shrestha, Donald Paterson, Raviteja Theertham, Aseer Chowdhury:
22.2 A 700MHZ-BW -164dBFS/Hz-Small-Signal-NSD 703mW Continuous-Time Pipelined ADC with On-Chip Digital Reconstruction Achieving 3 using Digital Cancellation of DAC Errors. ISSCC 2024: 390-392
2020
[c15]
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  - conf/isscc/ShibataTSKPPGDY20
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Hajime Shibata, Gerry Taylor, Bob Schell, Victor Kozlov, Sharvil Patil, Donald Paterson, Asha Ganesan, Yunzhi Dong, Wenhua Yang, Yue Yin, Zhao Li, Prawal Shrestha, Athreya Gopal, Aathreya S. Bhat, Shanthi Pavan:
16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter. ISSCC 2020: 260-262

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