Future scaling of datacenter power-efficiency.

Jacob Leverich Jacob Leverich Future scaling of datacenter power-efficiency. Stanford University, USA 2014 https://searchworks.stanford.edu/view/10408986 Jacob Leverich Christos Kozyrakis Reconciling high server utilization and sub-millisecond quality-of-service. 4:1-4:14 2014 EuroSys https://doi.org/10.1145/2592798.2592821 conf/eurosys/2014 db/conf/eurosys/eurosys2014.html#LeverichK14

Jung Ho Ahn Norman P. Jouppi Christos Kozyrakis Jacob Leverich Robert S. Schreiber Improving System Energy Efficiency with Memory Rank Subsetting. 4:1-4:28 2012 9 ACM Trans. Archit. Code Optim. 1 https://doi.org/10.1145/2133382.2133386 db/journals/taco/taco9.html#AhnJKLS12

John K. Ousterhout Parag Agrawal David Erickson Christos Kozyrakis Jacob Leverich David Mazières Subhasish Mitra Aravind Narayanan Diego Ongaro Guru M. Parulkar Mendel Rosenblum Stephen M. Rumble Eric Stratmann Ryan Stutsman The case for RAMCloud. 121-130 2011 54 Commun. ACM 7 https://doi.org/10.1145/1965724.1965751 db/journals/cacm/cacm54.html#OusterhoutAEKLMMNOPRRSS11

Jacob Leverich Christos Kozyrakis On the energy (in)efficiency of Hadoop clusters. 61-65 2010 44 ACM SIGOPS Oper. Syst. Rev. 1 https://doi.org/10.1145/1740390.1740405 https://www.wikidata.org/entity/Q131114040 db/journals/sigops/sigops44.html#LeverichK10

Jacob Leverich Vanish Talwar Parthasarathy Ranganathan Christos Kozyrakis Evaluating impact of manageability features on device performance. 426-430 2010 CNSM https://doi.org/10.1109/CNSM.2010.5691253 conf/cnsm/2010 db/conf/cnsm/cnsm2010.html#LeverichTRK10

Jung Ho Ahn Jacob Leverich Robert S. Schreiber Norman P. Jouppi Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs. 5-8 2009 8 IEEE Comput. Archit. Lett. 1 https://doi.org/10.1109/L-CA.2008.13 http://doi.ieeecomputersociety.org/10.1109/L-CA.2008.13 db/journals/cal/cal8.html#AhnLSJ09

Jacob Leverich Matteo Monchiero Vanish Talwar Parthasarathy Ranganathan Christos Kozyrakis Power Management of Datacenter Workloads Using Per-Core Power Gating. 48-51 2009 8 IEEE Comput. Archit. Lett. 2 https://doi.org/10.1109/L-CA.2009.46 http://doi.ieeecomputersociety.org/10.1109/L-CA.2009.46 db/journals/cal/cal8.html#LeverichMTRK09

John K. Ousterhout Parag Agrawal David Erickson Christos Kozyrakis Jacob Leverich David Mazières Subhasish Mitra Aravind Narayanan Guru M. Parulkar Mendel Rosenblum Stephen M. Rumble Eric Stratmann Ryan Stutsman The case for RAMClouds: scalable high-performance storage entirely in DRAM. 92-105 2009 43 ACM SIGOPS Oper. Syst. Rev. 4 https://doi.org/10.1145/1713254.1713276 db/journals/sigops/sigops43.html#OusterhoutAEKLMMNPRRSS09

Jung Ho Ahn Norman P. Jouppi Christos Kozyrakis Jacob Leverich Robert S. Schreiber Future scaling of processor-memory interfaces. 2009 SC https://doi.org/10.1145/1654059.1654102 conf/sc/2009 db/conf/sc/sc2009.html#AhnJKLS09

Jacob Leverich Hideho Arakida Alex Solomatnikov Amin Firoozshahian Mark Horowitz Christos Kozyrakis Comparative evaluation of memory models for chip multiprocessors. 2008 5 ACM Trans. Archit. Code Optim. 3 https://doi.org/10.1145/1455650.1455651 db/journals/taco/taco5.html#LeverichASFHK08 12:1-12:30

Jacob Leverich Hideho Arakida Alex Solomatnikov Amin Firoozshahian Mark Horowitz Christos Kozyrakis Comparing memory systems for chip multiprocessors. 358-368 2007 conf/isca/2007 ISCA https://doi.org/10.1145/1250662.1250707 db/conf/isca/isca2007.html#LeverichASFHK07 Parag Agrawal Jung Ho Ahn Hideho Arakida David Erickson Amin Firoozshahian Mark Horowitz Norman P. Jouppi Christoforos E. KozyrakisChristos Kozyrakis David Mazières Subhasish Mitra Matteo Monchiero Aravind Narayanan Diego Ongaro John K. Ousterhout Guru M. Parulkar Parthasarathy Ranganathan Mendel Rosenblum Stephen M. Rumble Robert S. Schreiber Alex Solomatnikov Eric Stratmann Ryan Stutsman Vanish Talwar