<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<inproceedings key="conf/aspdac/LiWLHL19" mdate="2025-09-06">
<author>Jiajun Li</author>
<author orcid="0000-0001-5172-4736">Ying Wang 0001</author>
<author orcid="0000-0001-7123-7425">Bosheng Liu</author>
<author>Yinhe Han 0001</author>
<author orcid="0000-0002-0874-814X">Xiaowei Li 0001</author>
<title>Simulate-the-hardware: training accurate binarized neural networks for low-precision neural accelerators.</title>
<pages>323-328</pages>
<year>2019</year>
<booktitle>ASP-DAC</booktitle>
<ee>https://doi.org/10.1145/3287624.3287628</ee>
<ee>https://www.wikidata.org/entity/Q131113932</ee>
<crossref>conf/aspdac/2019</crossref>
<url>db/conf/aspdac/aspdac2019.html#LiWLHL19</url>
</inproceedings>
</dblp>
