Design of analog subthreshold Encoded Neural Network circuit in sub-100nm CMOS.

Benoit Larras Cyril Lahuec Fabrice Seguin Matthieu Arzel Design of analog subthreshold Encoded Neural Network circuit in sub-100nm CMOS. 1-7 2015 IJCNN https://doi.org/10.1109/IJCNN.2015.7280672 conf/ijcnn/2015 db/conf/ijcnn/ijcnn2015.html#LarrasLSA15