<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<article key="journals/tcas/JaiswalS17" mdate="2020-05-22">
<author orcid="0000-0002-8722-508X">Manish Kumar Jaiswal</author>
<author orcid="0000-0002-6514-0237">Hayden Kwok-Hay So</author>
<title>Area-Efficient Architecture for Dual-Mode Double Precision Floating Point Division.</title>
<pages>386-398</pages>
<year>2017</year>
<volume>64-I</volume>
<journal>IEEE Trans. Circuits Syst. I Regul. Pap.</journal>
<number>2</number>
<ee>https://doi.org/10.1109/TCSI.2016.2607227</ee>
<ee>https://www.wikidata.org/entity/Q59789285</ee>
<url>db/journals/tcas/tcasI64.html#JaiswalS17</url>
</article></dblp>
