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Computer Science > Logic in Computer Science

arXiv:1309.0867v1 (cs)
[Submitted on 3 Sep 2013]

Title:Robustness Analysis for Value-Freezing Signal Temporal Logic

Authors:L. Brim (Masaryk University), T. Vejpustek (Masaryk University), D. Šafránek (Masaryk University), J. Fabriková (Masaryk University)
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Abstract:In our previous work we have introduced the logic STL*, an extension of Signal Temporal Logic (STL) that allows value freezing. In this paper, we define robustness measures for STL* by adapting the robustness measures previously introduced for Metric Temporal Logic (MTL). Furthermore, we present an algorithm for STL* robustness computation, which is implemented in the tool Parasim. Application of STL* robustness analysis is demonstrated on case studies.
Comments: In Proceedings HSB 2013, arXiv:1308.5724
Subjects: Logic in Computer Science (cs.LO); Computational Engineering, Finance, and Science (cs.CE); Systems and Control (eess.SY)
Cite as: arXiv:1309.0867 [cs.LO]
  (or arXiv:1309.0867v1 [cs.LO] for this version)
  https://doi.org/10.48550/arXiv.1309.0867
Journal reference: EPTCS 125, 2013, pp. 20-36
Related DOI: https://doi.org/10.4204/EPTCS.125.2

Submission history

From: EPTCS [view email] [via EPTCS proxy]
[v1] Tue, 3 Sep 2013 23:40:57 UTC (207 KB)
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