From 93f6ac39f20f64a879507db98a16177530e9f3d4 Mon Sep 17 00:00:00 2001 From: Alan Wu Date: Mon, 19 Oct 2020 09:47:39 -0400 Subject: MicroJIT: Don't compile trace instructions --- iseq.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'iseq.c') diff --git a/iseq.c b/iseq.c index 971f1c54c7..6b8f3d0e2c 100644 --- a/iseq.c +++ b/iseq.c @@ -3232,6 +3232,25 @@ rb_vm_insn_addr2insn(const void *addr) rb_bug("rb_vm_insn_addr2insn: invalid insn address: %p", addr); } +// Unlike rb_vm_insn_addr2insn, this function can return trace opcode variants. +int +rb_vm_insn_addr2opcode(const void *addr) +{ + st_data_t key = (st_data_t)addr; + st_data_t val; + + if (st_lookup(rb_encoded_insn_data, key, &val)) { + insn_data_t *e = (insn_data_t *)val; + int opcode = e->insn; + if (addr == e->trace_encoded_insn) { + opcode += VM_INSTRUCTION_SIZE/2; + } + return opcode; + } + + rb_bug("rb_vm_insn_addr2opcode: invalid insn address: %p", addr); +} + // Decode `iseq->body->iseq_encoded[i]` to an insn. int rb_vm_insn_decode(const VALUE encoded) -- cgit v1.2.3