Initialize RzIL VM when opening a core dump

[Rot127]

Is your feature request related to a problem? Please describe.

Once we have the RzIL analysis implemented the VM should be updated with information with from a core dump.
This is useful, because it enables easy analysis with via RzIL. And skips our somewhat buggy debugging code.

Describe the solution you'd like

Currently the register state is restored from the core dump is done here:

rizin/librz/core/cfile.c

Lines 1109 to 1113 in 095d53a

	if (rz_reg_arena_set_bytes(r->analysis->reg, binfile->o->regstate)) {
	RZ_LOG_WARN("Setting up coredump: Problem while setting the registers\n");
	} else {
	RZ_LOG_INFO("Setting up coredump: Registers have been set\n");
	}

But it just memcpy the bytes and can't handle register files which might have different orders.
This is buggy for floating point registers and some OS (OpenBSD) doesn't share the same reg file layout with Linux.

Also the debug register file can be different from the VM one.
So the coredump regs should be restored additionally in the RzIL VM for further analysis.
Preferably in a user defined manner.

Describe alternatives you've considered

Fixing the RzBin code and restore the registers properly there.
Then init the VM from it.

Additional context

Related because it documents broken handling of floating point register:
#5334

[notxvilka]

I think implementing parsing properly in the RzDebug/RzBin is a cleaner solution, though. Not sure how RzIL could help for this task, to be honest. Could you please share the details?

[Rot127]

The core dump is essentially a snapshot of the machine state. The RzBin/RzDebug plugin just doesn't handle most of it.
For example, Sparc can save and restore register files (usually up to 8). But RzDebug doesn't really have the concept of stored register files. Because they are inherently a dynamic property of the machine.

For these things it would make sense to directly init a VM.