Search Results for "simulation software for digital circuits"

PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic...

Mixed Analog/Digital Simulator framework - parser and elaborator for Verilog and Verilog-AMS, and an extended C++ (ParC - http://parallel.cc) to be used as the simulation engine.

DSPemu emule a digital signal processor TMS320F243, with console interface showing the registers and memory. With DSPemu is possible test algorithms such as Filter, FFT/IFFT. This can be integrate and used with a circuit simulator.

edef - A small simulation framework for logic circuits, autoregressive processes, digital controller circuits and many more. Also there is a GUI application, that integrates a simple development environment and a circuit editor.

ASSL (pronounced AY-sil), is a wrapper around CHP, an established async. process description language. This project provides a set of tools that aid the design, simulation, and synthesis of async. VLSI circuits. Common parser, independent tool projects

SVATS [Safety Verification Analysis added To Spice] is a Pyhton written EDA tool used for adding repetitive analysis capabilities to perform FMEAs on analog and mixed analog-digital electronic circuits using Berkeley Spice-like simulation SW