Kaiyan Chang

This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.

Known people with the same name:

Bibliography

2025
AutoSilicon: Scaling Up RTL Design Generation Capability of Large Language Models.
ACM Trans. Design Autom. Electr. Syst., November, 2025

A data-centric chip design agent framework for Verilog code generation.
ACM Trans. Design Autom. Electr. Syst., November, 2025

LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow.
CoRR, August, 2025

ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning.
CoRR, July, 2025

Large Processor Chip Model.
CoRR, June, 2025

RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework.
CoRR, January, 2025

RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
ChipGPT: How far are we from natural language hardware design.
CoRR, 2023

Full State Quantum Circuit Simulation Beyond Memory Limit.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2021
ArchNet: A data hiding design for distributed machine learning systems.
J. Syst. Archit., 2021

2020
ArchNet: Data Hiding Model in Distributed Machine Learning System.
CoRR, 2020


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