Memory organization plays a crucial role in improving system performance and efficiency. Based on how the CPU accesses different levels of memory, two main approaches are used: Simultaneous Access Memory Organization and Hierarchical Access Memory Organization.
Simultaneous Access Memory Organization
CPU can access the data simultaneously from all levels of memory i.e. if it was trying to access data from level 1 but it didn't get. So, it can check in other levels at the same time as shown in the figure below.
Figure -Simultaneous Access Memory Organization
Average Memory Access Time for Simultaneous Access Memory Organization
Let there be total three levels in a memory i.e. L1, L2, L3 and H1, H2,H3 are the hit ratios for data to be found in respective levels. T1, T2, T3 be the access time for these levels. Then Average Memory Access time for Simultaneous Access Memory Organization is
Because the chances to get data in L3 will be 100% if it is not found in L2 and L3 , so H3=1 is used here.
Hierarchical Access Memory Organization
CPU can't access data simultaneously from all levels of memory as it is only connected to level 1 of memory here. So, the data will come from other levels to the level 1 then CPU will get its access as shown in the figure below.
Figure - Hierarchical Access Memory Organization
Average Memory Access Time for Hierarchical Access Memory Organization
Let there be total three levels in a memory i.e. L1, L2, L3 and H1, H2,H3 are the hit ratios for data to be found in respective levels. T1, T2, T3 be the access time for these levels. Then Average Memory Access time for Hierarchical Access Memory Organization is
Again, H3=1 will be used here as it was used above for average memory access time in case of Simultaneous Access Memory Organization.
Also, if data is not found in L1 then time to access data will be T1+T2 while checking for it in L2 and so on for further levels.
Simultaneous Access vs Hierarchical Access Memory Organization
| Feature | Simultaneous Access Memory Organization | Hierarchical Access Memory Organization |
|---|---|---|
| Connection | CPU is directly connected to all memory levels | CPU is directly connected only to L1 (Level-1) memory |
| Data Access | CPU can access data from all levels simultaneously | CPU always accesses data from L1 first |
| On Cache Miss | CPU can directly access higher levels (L2, L3, …) | Data is first transferred from higher levels to L1, then accessed |
| Access Method | Parallel access to multiple memory levels | Sequential (level-by-level) access |
| Efficiency | Faster but complex to implement | More practical and widely used |
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