Counter is a sequential circuit implemented via flip flops. They are used to count the number of clock signals or pulse. A mod n counter will count from 0 to n-1.
Counters can be synchronous or asynchronous. In synchronous counter, a single common clock is used for all the flip flops. Whereas in asynchronous counter, only a clock is given as input for first flip flop. For an intermediate or final flip flops, its clock pulse will be the output of previous flip flop.
Problem - Design synchronous counter for sequence: 0 → 1 → 3 → 4 → 5 → 7 → 0, using T flip-flop. Explanation - For given sequence, state transition diagram as following below:
State Transition Table Logic
| Present State | Next State |
|---|---|
| 0 | 1 |
| 1 | 3 |
| 3 | 4 |
| 4 | 5 |
| 5 | 7 |
| 7 | 0 |
State transition table for given sequence
| Present State | Next State | ||||
|---|---|---|---|---|---|
| Q3 | Q2 | Q1 | Q3(t+1) | Q2(t+1) | Q1(t+1) |
| 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 | 1 | 1 |
| 0 | 1 | 1 | 1 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 | 1 |
| 1 | 0 | 1 | 1 | 1 | 1 |
| 1 | 1 | 1 | 0 | 0 | 0 |
T flip-flop - If value of Q changes either from 0 to 1 or from 1 to 0 then input for T flip-flop is 1 else input value is 0.
| Qt | Qt+1 | T |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Draw input table of all T flip-flops by using the excitation table of T flip-flop. As nature of T flip-flop is toggle in nature. Here, Q3 as Most significant bit and Q1 as least significant bit.
| Input table of Flip-Flops | |||
|---|---|---|---|
| T3 | T2 | T1 | |
| 0 | 0 | 1 | |
| 0 | 1 | 0 | |
| 1 | 1 | 1 | |
| 0 | 0 | 1 | |
| 0 | 1 | 0 | |
| 1 | 1 | 1 | |
Find value of T3, T2, T1 in terms of Q3, Q2, Q1 using K-Map (Karnaugh Map): 
Therefore,
T3 = Q2
Therefore,
T2 = Q1
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Therefore,
T1 = Q2+Q1'
Now, you can design required circuit using expressions of K-maps: 
Advantages of Counters
- Counters can be use for measuring time. E.g. Elapsed time, Response time, etc.
- They can be used in real time system
- They are easy to implement and cost effective
Disadvantages of Counters
- The hazards and delay in flip-flop can create error
- Different digital circuit are to be realized for different value of n and type of flip flop used in n-mod counter