Question 1
Which one of the following circuits is NOT equivalent to a 2-input XNOR (exclusive NOR) gate? [GATE||2011||MCQ||1MARKS]





Question 2
The truth table represents the Boolean function [GATE||2012||MCQ||1MARKS]
X | Y | (X,Y) |
|---|---|---|
0 | 0 | 0 |
0 | 1 | 0 |
1 | 0 | 1 |
1 | 1 | 1 |
X
X + Y
X ⊕ Y
Y
Question 3
Which one of the following expressions does NOT represent exclusive NOR of x and y? [GATE 2013 || MCQ || 1 MARKS ]
xy+x'y'
x⊕y'
x'⊕y
x'⊕y'
Question 4
Let ⊕ denote the Exclusive OR (XOR) operation. Let ‘1’ and ‘0’ denote the binary constants. Consider the following Boolean expression for F over two variables P and Q:
F(P, Q) = ((1⊕P)⊕(P⊕Q)) ⊕ ((P⊕Q) ⊕ (Q⊕O))
The equivalent expression for F is [GATE||2014||SET3||MCQ||2MARKS]
P+Q
(P+Q)'
P⨁Q
(P⨁Q)'
Question 5
Let, x1⊕x2⊕x3⊕x4 = 0 where x1, x2, x3, x4 are Boolean variables, and ⊕ is the XOR operator. Which one of the following must always be TRUE? [GATE||2016||SET2||1MARKS]
x1x2 x3x4 = 0
x1x3+x2 = 0
x1 '⊕x3 '= x2 '⊕ x4 '
x1 + x2 + x3 + x4 = 0
Question 6
Consider the Boolean operator # with the following properties: x#0 = x, x#1 = x', x#x = 0 and x#x' = 1 Then x#y is equivalent to [GATE||2016||SET1||1MARKS]
x'y + xy'
xy' + (xy)
x'y + xy
xy + (xy)'
Question 7
Which one of the following is NOT a valid identity?[GATE|| 2019 || MCQ || 1 Mark]
(x + y) ⊕ z = x ⊕ (y + z)
(x ⊕ y) ⊕ z = x ⊕ (y ⊕ z)
x ⊕ y = x + y, if xy = 0
x ⊕ y = (xy + x'y')'
Question 8
Consider the following logic circuit diagram.

Which is/are the CORRECT option(s) for the output function F ? [GATE || 2025 || SET 2|| MSQ || 2-mark]
(XY)'
X' + Y' + XY'
(XY)' + X' + XY'
X + Y'
Question 9
Consider the circuit shown below where the gates may have propagation delays. Assume that all signal transitions occur instantaneously and that wires have no delays.

Which of the following statements about the circuit is/are CORRECT? [GATE|| 2024 ||SET 1||MSQ || 2-mark ]
With no propagation delays, the output Y is always logic Zero
With no propagation delays, the output Y is always logic One
With propagation delays, the output Y can have a transient logic One after X transitions from logic Zero to logic One
With propagation delays, the output Y can have a transient logic Zero after X transitions from logic One to logic Zero
Question 10
Consider 4-variable functions f1, f2, f3, f4 expressed in sum-of-minterms form as given below.
f1 = ∑(0,2,3,5,7,8,11,13)
f2 = ∑(1,3,5,7,11,13, 15)
f3 = ∑(0,1,4,11)
f4 = ∑(0,2,6,13)

With respect to the circuit given above, which of the following options is/are CORRECT? [GATE|| 2024 SET2|| MSQ ||1-mark]
Y= ∑(0,1,2,11,13)
Y= Π (3,4,5,6,7,8,9,10,12,14,15)
Y= ∑(0,1,2,3,4,5,6,7)
Y= Π (8,9,10,11,12,13,14,15)
There are 11 questions to complete.