GATE EC || DIGITAL LOGIC || PYQS (ALL)

The 2’s complement of–17 is:

(GATE 2001 || EC || MCQ || 1 MARK)

The 4-bit 2’s complement representation of a decimal number is 1000. The number is:

(GATE 2002 || EC || MCQ || 1 MARK)

The range of signed decimal numbers that can be represented by a 6-bit 1’s complement number is:

(GATE 2004 || EC || MCQ || 1 MARK)

X = 01110 and Y = 11001 are two 5-bit binary numbers represented in 2’s complement format. The sum of X and Y represented in 2’s complement format using 6 bits is:

(GATE 2007 || EC || MCQ ||1 MARK)

11001, 1001 and 111001 are 2’s complement representations of which of the following sets of numbers?

(GATE 2004 || EC || MCQ || 1 MARK)

For the logic circuit shown in the figure, the required input conditions (A, B, C) to make the output X = 1 are:

(GATE 2000 || EC || MCQ || 1 MARK)

For the ring oscillator shown in the figure, the propagation delay of each inverter is 100 pico sec. What is the fundamental frequency of the oscillator output?

( GATE 2001 || EC || PYQ || MCQ || 1 MARK)

In the figure, the LED:

( GATE 2001 || EC || PYQ || MCQ || 1 MARK)

The figure shows the internal schematic of a TTLAND-OR-Invert (AOI) gate. For the inputs shown in the figure, the output Y is 

( GATE 2004 || EC || PYQ || MCQ || 1 MARK )

A Boolean function f of two variables x and y is defined as follows:

f (0, 0) = f (0,1) = f (1, 1) = 1; f (1, 0) = 0

Assuming complements of x and y are not available, a minimum cost solution or realizing f using only 2-input NOR gates and 2-input OR gates (each having unit cost) would have a total cost of: 

( GATE 2004 || EC || PYQ || MCQ || 1 MARK )