Siemens EDA (Siemens Digital Industries Software)

AI infrastructure starts with the teams designing the silicon behind it. At this week’s AI Infra Summit, we showed how AI-native EDA workflows can help engineering teams address the challenges shaping next-generation compute — from chiplet complexity and power-aware design to verification, RTL-to-GDS implementation and co-verification. The takeaway: ambitious AI architectures require purpose-built tools for designing, verifying, optimizing and implementing the silicon and systems AI infrastructure depends on. Thank you to everyone who visited our booth, joined our sessions and shared your perspective! #AIInfraSummit #SemiconductorDesign #AgenticAI

Traceability breaks quietly. The consequences usually do not. In 3D IC development, one uncaptured design change can create risk across dies, interposers, package data and signoff. As design flows become more connected and data-heavy, traceability becomes harder to manage. Each tool can create its own record of results. Updates can live across spreadsheets, email threads and team knowledge. A change to one die, interposer or interconnect can ripple across the full design. In our latest 3D IC podcast episode, host Tova Levy talks with Vishal Moondhra, VP of Solutions at Perforce Software, about how engineering teams can close that traceability gap. Vishal explains the concept of the atomic change: every dependent update is captured as one complete unit, helping teams avoid partial or disconnected records. He also discusses the difference between PLM and IPLM: ➡️ PLM governs slower, highly reviewed product-level decisions ➡️ IPLM tracks the fast, daily pace of design changes Tune in to see how we're connecting tools such as Solido, Calibre and Questa with IPLM to give engineering teams a more connected source of design data across the flow.

AI factories are placing new demands on the semiconductor ecosystem. As AI workloads scale, compute, networking, power, cooling and automation must operate as an integrated system. Digital twins and physics-based simulation can help teams model these dependencies, optimize operations and adapt infrastructure as requirements change. In this article, we explore the emerging AI factory operating system and how open, interoperable technologies can connect the physical and digital worlds — from chip to rack to grid. Learn how Siemens and NVIDIA are advancing the infrastructure needed to support the next generation of AI factories. #AI #SemiconductorIndustry

The path toward one trillion transistors calls for EDA that sees the whole system. Power, thermal behavior, packaging, signal integrity and timing are increasingly interconnected across the chip, package, board and data center. A decision in one part of the system can affect performance elsewhere. In the latest Industry Forward podcast, Dale Tutt speaks with Ankur Gupta about how EDA must evolve for this increasingly interconnected world. They discuss: ✅ Why chip design requires a system-level view ✅ How 2.5D and 3D packaging support new chip configurations ✅ How thermal behavior and power delivery influence system performance ✅ How AI can help engineers interact with EDA tools through natural language ✅ Why EDA must address rising levels of semiconductor complexity Tune in to learn more: https://sie.ag/6aN5VC #SemiconductorIndustry #Electronics

At SEMICON Taiwan, the conversation kept circling back to the same thing: AI is reshaping how chips get designed, not just what they'll do. Sathishkumar Balasubramanian spoke at the SEMI Taiwan IC Forum on Advanced Chip Technology and Manufacturing about the EDA side of this shift. As nodes get more complex with FinFET, GAA/Nanosheet, EUV, and ALD, design tools have to evolve too. We're weaving AI into every engine, every workflow, every decision. AI-native EDA with faster engines through GPU acceleration and machine learning. Smarter workflows with agentic AI handling the complexity. Trusted outcomes because every decision gets validated against our physics-based engines. #SemiconductorIndustry #SEMICONTaiwan2026

As AI becomes increasingly agentic, the next frontier is bringing that intelligence into the physical world. Building physical AI systems that can move from development to deployment requires collaboration across the entire technology stack. That’s why we're joining Arm Total Design for Physical AI. The program brings together more than 80 organizations to collaborate on developing software stacks, AI models, sensors, compute hardware, virtual platforms and digital twins to enable earlier development and validation of physical AI solutions. At Siemens, we are bridging the gap between virtual innovation and physical reality. By integrating our Hardware-Assisted Verification (HAV) solutions, like Veloce Strato CS, with the Arm Neoverse ecosystem, we are enabling partners to validate complex AI workloads with unprecedented speed. A key enabler is ANA, or Architecture Native Acceleration. By running virtual platforms natively on Arm-based infrastructure, we help developers shift software validation earlier and identify defects months before first silicon. We’re looking forward to working alongside Arm and the wider ecosystem to help move the next generation of physical AI systems forward.

NanoBridge Semiconductor, Inc. is leading the way in the research, development and deployment of low-power and harsh-environment semiconductor innovations. ⚡⤵️ What's powering the Japanese company’s latest field-programmable gate array (FPGA) development initiatives? The adoption of our Precision FPGA Synthesis software. This collaboration will offer customers working with demanding applications and environments with an optimized flow tuned for the company's NBS6503H and NBS1201 FPGA device families, meaning teams can: • Develop more efficient implementation workflows • Accelerate design and development • Reduce complexity • Deliver advanced products to market faster Read the full press release for more details and insights from Yukio Tsuchida, vice president for Siemens EDA, Japan, Siemens Digital Industries Software, and Toshitsugu Sakamoto, co-founder and chief technology officer at NanoBridge Semiconductor, Inc.: https://sie.ag/6sPL9C

Verification debug has a way of turning one failure into a full investigation. The right debug flow helps teams move from symptom to root cause with less rework.

Search the manual. Query the data sheet. Generate the script. Create the test bench. Our Fuse EDA AI system brings generative and agentic AI capabilities into the chip and PCB design workflows engineers use every day. Watch the video to see how Fuse can help engineers extract information from technical documentation, generate scripts and configuration files, support RTL-to-GDS and custom IC workflows, create DRC-clean layouts, and generate property assertions and test benches for verification. Fuse connects EDA knowledge, design data and automation to help streamline engineering workflows. #Semiconductor #Electronics

Happy International Dog Day! 🐾 Our four-legged friends bring important expertise to the team. See their specialties below, then drop a picture of your dog in the comments to find out what their job title would be at Siemens EDA.