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SEMICONDUCTOR TM
March 1998
DM7473
Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
General Description
This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops after a complete clock pulse. While the clock is low the slave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master. While the clock is high the J and K inputs are disabled. On the negative transition of the clock, the data from the master is transferred to the slave. The logic states of the J and K inputs must not
be allowed to change while the clock is high. Data transfers to the outputs on the falling edge of the clock pulse. A low logic level on the clear input will reset the outputs regardless of the logic states of the other inputs.
Features
• Alternate Military/Aerospace device (5473) is available.
Contact a Fairchild Semiconductor Sales Office/Distributor for specifications.
Connection Diagram
J1
Dual-In-Line Package
14
13
I~
A
GND K2
111 110
:::UL
J2
CLK 1
_j I
I
0-
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A
_jJL
K1
CLK 2
Function Table
Order Number 5473DMQB, 5473FMQB, DM5473J, DM5473W or DM7473N See Package Number J14A, N14A or W14B
D8OO6525-1
Inputs Outputs
ClR ClK J K Q Q
L X X X L H
H .rt, L L 00 00
H .rt, H L H L
H .rt, L H L H
H .rt, H H Toggle H = High Logic Level L = Low Logic Level
X = Either Low or High Logic Level
JL = Positive pulse data. the J and K inputs must be held constant while the clock is high. Data is transferred to the outputs on the falling edge of the clock pulse.
00 = The output logic level before the indicated input conditions were established.
Toggle = Each output changes to the complement of its previous level on each high level clock pulse.
<C> 1998 Fairchild Semiconductor Corporation 08006525
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Absolute Maximum Ratings (Note 1) DM54 and 54 _55°C to +125°C
Supply Voltage 7V DM74 O°C to +70°C
Input Voltage 5.5V Storage Temperature Range _65°C to +150°C
Operating Free Air Temperature Range
Recommended Operating Conditions
Symbol Parameter DM5473 DM7473 Units
Min Nom Max Min Nom Max
Vee Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V,H High Level Input Voltage 2 2 V
v, Low Level Input Voltage 0.8 0.8 V
10H High Level Output Current -0.4 -0.4 mA
10l Low Level Output Current 16 16 mA
felK Clock Frequency (Note 6) 0 15 0 15 MHz
tw Pulse Width Clock High 20 20
(Note 6) Clock Low 47 47 ns
Clear Low 25 25
tsu Input Setup Time (Notes 2, 6) ot ot ns
tH Input Hold Time (Notes 2, 6) ot ot ns
TA Free Air Operating Temperature -55 125 0 70 °C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these
limits. The parametric values defined in the "Electrical Characteristics" table are not guaranteed at the absolute maximum ratings. The "Recommended Operating
Conditions" table will define the conditions for actual device operation.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 3)
V, Input Clamp Voltage Vee = Min, I, = -12 mA -1.5 V
VOH High Level Output Vee = Min, 10H = Max 2.4 3.4 V
Voltage Vu. = Max, V,H = Min
VOL Low Level Output Vee = Min, IOL = Max 0.2 0.4 V
Voltage V,H = Min, Vu. = Max
I, Input Current @ Max Vee = Max, V, = 5.5V 1 mA
Input Voltage
I'H High Level Input Vee = Max J, K 40
Current V, = 2.4V Clock 80 flA
Clear 80
I'l Low Level Input Vee = Max J, K -1.6
Current V, = O.4V Clock -3.2 mA
Clear -3.2
los Short Circuit Vee = Max DM54 -20 -55 mA
Output Current (Note 4) DM74 -18 -55
Icc Supply Current Vee = Max, (Note 5) 18 34 mA
Note 2: The symbol (t, J,) indicates the edge of the clock pulse is used for reference: (t) for rising edge, (J,) for falling edge.
Note 3: All typicals are at Vee = 5V, TA = 25°C.
Note 4: Not more than one output should be shorted at a time.
Note 5: With all outputs open, Icc is measured with the Q and Q outputs high in turn. At the time of measurement the clock input grounded.
Note 6: TA = 25°C and Vee = 5V. www.fairchildsemi.com
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Switching Characteristics
at Vee = 5V and TA = 25°C
From (Input) RL = 4000.
Symbol Parameter To (Output) CL = 15 pF Units
Min Max
fMAX Maximum Clock 15 MHz
Frequency
tpHL Propagation Delay Time Clear 40 ns
High to Low Level Output to Q
tpLH Propagation Delay Time Clear 25 ns
Low to High Level Output toO
tpHL Propagation Delay Time Clock to 40 ns
High to Low Level Output QorO
tpLH Propagation Delay Time Clock to 25 ns
Low to High Level Output QorO 3
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Physical Dimensions inches (millimeters) unless otherwise noted
0.025 10.635) RAD
I
0.220-0.310
15.588-7.874)
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0.200 15.080)
EE~~~R~~~~~;;t3-M1AIX 0.020-0.060
86094'TYy
0.008-0.012
W- 0.310-0.410 ~ 10.203-0.305) 'I
17.874-10.41) 0.098 I-- 12.489)-
MAX BOTH ENDS __
l 0.018±0.003 --11-
10.457,0.076) 13.175-5.080)
O.100±O.010 0.150
12.540 ±0.254) ii8ij
MIN
0.125-0.200
J14A (REV G)
14-Lead Ceramic Dual-In-Line Package (J) Order Number 5473DMQB or DM5473J Package Number J14A
I 0,740-0.770
..._____ (18.80-19,56) _________.
0.090 _____. "-(2.286)
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INDEX
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1l.250±II.01D
(6.35010.254)
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PIN NO.1 i0F5~ 6
IDENT 7ill
~[IIA ~MAX _/
(2.337) [0.762) DEPTH
OPTION 1
PIN NO 1 IDENT
mWli
OPTION 02
Q.135±Q,Q05 (3.429±0.127)
0.300-0.3211
1~'8~~:)
~0~08-0.016TYP
~..:::t., _~~I (0.203-0.406)
I 0.'80
--(7.112)____", MIN
0.145-0.200
~
1
, t
f
0.020 ,
(DM~~8) 0.125-=-0';;--11
13.175-3.810)
0.014-0,023 TYP _____.. ..---
10.356-0.584) _I
14-Lead Molded Dual-In-Line Package (N) Order Number DM7473N Package Number N14A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
j+- 0.080 0.050
-0.385 MAX-
~ JL 0.012
0.008
0.050 ± 0.005 j+- -j --- 0.005 MIN TYP
TYP ~
14
I I
0.370
I I 0.250
--1
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0.280 MAX ~ 0.260
GLLh 0.235
--1
DETAIL A I-Y :
lj:
PIN # 1 I
IDENT
1 ' 7
0.019 TYP _J I- -- 0.045 MAX
0.015 TYP W14B (REV J)
DETAIL A
0.006_jL
0.004 TYP
14-Lead Ceramic Flat Package (W) Order Number 5473FMQB or DM5473W Package Number W14B
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Fairchild Semiconductor Corporation
Americas
Customer Response Center Tel: 1-888-522-5372
Fairchild Semiconductor
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13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimsha1sui, Kowloon
Hong Kong
Tel: +8522737-7200 Fax: +8522314-0061
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Email: [email protected] Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56
Italy Tel: +39 (0) 2 57 5631
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications
