PRINCIPLES OF CIRCUIT SIMULATION
Lecture 7.
Element Stamping
Guoyong Shi, PhD
[email protected]
School of Microelectronics
Shanghai Jiao Tong University
Spring 2010
2010-9-27
Slide 1
Outline
Basic Concepts
KVL/KCL
Circuit Element Equations
Sparse Tabular Analysis (STA)
Nodal Analysis
Modified Nodal Analysis (MNA)
Part 1: Static Element Stamping
2010-9-27
Lecture 7
slide 2
Formulation of Circuit Equations
Kirchoff Current Law (KCL)
Kirchoff Voltage Law (KVL)
Circuit Element Equations
2010-9-27
Lecture 7
slide 3
Basic Concepts
Node num
Circuit Element
R3
G2v3
v3 -
R1
IS5
R4
0
Branch
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Reference/datum node
Lecture 7
slide 4
Basic Physical Quantities
Every circuit element (1 or 2
ports) is characterized by (i,v)
equations
Node/Terminal
Voltage e
KCL for nodes
KVL for loops
R3
G2v3
v3 -
R1
IS5
R4
0
Reference node: e = 0
Branch current i
Branch voltage v
2010-9-27
Lecture 7
slide 5
Circuit Element Equations
Mathematical models of circuit components are expressed in
terms of ideal elements:
Inductors
Capacitors
Resistors
Current Sources
Voltage Sources
Two Ports
.
Physical quantities current, voltage
Some times, we need to use quantities: charge (nonlinear
capacitor), flux (nonlinear inductor)
2010-9-27
Lecture 7
slide 6
Reference Directions
Two-terminal
+
V
Two-port
i
+
V1
-
i1
i2
i1
i2
+
V2
-
i and v are branch currents and voltages, respectively
(Default) For each branch, current is directed from higher
potential to lower potential
2010-9-27
Lecture 7
slide 7
Resistor
Resistors
Symbol
Linear
Nonlinear
Current
controlled
i = (1/R) v
v=Ri
i = i (v)
v = v (i)
2010-9-27
Voltage
controlled
Lecture 7
slide 8
Capacitor
Capacitor
Symbol
Voltage controlled
Linear
q=Cv
i = dq / dt
Time-invariant C:
Nonlinear
i = C dv/dt
q = q (v)
i = dq / dt
Time-invariant C:
+
2010-9-27
Lecture 7
i = C(v) dv/dt
slide 9
Two-Port Elements
Controlled
Sources
Symbol
VCVS
+
Vc
CCCS
+
Vc
2010-9-27
Ik
+
Ic
Ek
+
-
Fk
Nonlinear
vk = Ek vc
ic = 0
vk = vk(vc)
ic = 0
ik = Fk ic
vc = 0
ik = ik (ic)
vc = 0
Vk
Ik
+
Ic
linear
Vk
Lecture 7
slide 10
Topological Equations
KCL
(branch currents)
Current leaving a
node is "+"
i1
i2
i3 4
i1-i2-i3 = 0
KVL
e1
(nodal voltages)
Voltage dropping is
"+"
e2
1
+
2
-
v1
v1 + e2 e1 = 0
GND
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Lecture 7
slide 11
Matrix Forms
i1
+
v1
-
i3
i2 G2v3
i1
i2
1 1 1 0 0 0
0 0 1 1 1 i 3 = 0
i 4
i 5
KCL: A i = 0
+
v5
-
IS5
Nodal voltages
branch voltage vector
v 1
v2
v 3
v 4
v 5
1
1
1
0
0
0
e1
=
1
e 2
1
1
0
0
KVL v ATe = 0
iTv
Tellegens equation
=0
(conservation of energy)
2010-9-27
i4
R4
+
v4
e=0
i5
v3 -
R1
R3
Lecture 7
slide 12
Incidence Matrix A
node
branch
1 2 3.. j
1
2
3
.
i
:
Aij =
(+1,-1,0)
+1; if node i is + terminal of branch j
-1; if node i is terminal of branch j
0; if node i is not connected to the branch j
i1
i2
+
Each branch is directed
Properties
A is unimodular (all minors equal to 1, -1, or 0)
Only 2 nonzero entries in any column
Sum of all rows of A is a zero vector.
Thus, pick a node as the reference (ground) node
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Lecture 7
slide 13
Equation Assembly
How does a computer assemble equations
from the circuit description (netlist)?
Two systematic methods:
1. Sparse Tableau Analysis (STA)
Used by early ASTAP simulator (IBM)
2. Modified Nodal Analysis (MNA)
Used by SPICE simulators
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Lecture 7
slide 14
Sparse Tableau Analysis (STA)
Proposed by (Brayton, Gustavson, Hachtel 1969-71 )
Write KCL : Ai = 0
n equations (one for each node)
Write KVL : v ATe = 0 b equations (one for each branch)
Write Circuit Element (Branch) Equations :
Kii + Kvv = S
current
controlled
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voltage
b equations
sources
controlled
Lecture 7
slide 15
Sparse Tableau Analysis
Put all (n + 2b) equations together:
A
K
i
0
l
K
v
0 i 0
A
v = 0
e S
n + 2b unknowns
sparse
tableau
n = #nodes
b = #branches
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Lecture 7
slide 16
Advantages of STA
STA can be applied to any (linearized) circuit
STA equations can be assembled directly from netlist
STA coefficient matrix is very sparse
2b
0
K i
2b
I
Kv
0 i 0
T
A v = 0
0 e S
(2b+2b+b+b+b) nonzeros
sparsity is
7b
(n + 2b)2
Caution:
Sophisticated programming techniques and data structures
are required for achieving the time and memory efficiency
2010-9-27
Lecture 7
slide 17
Modified Nodal Analysis (MNA)
A more compact formulation
In MNA, every element is in conductance form!
Well review the steps how MNA is done.
Introduced by McCalla, Nagel, Rohrer, Ruehli, Ho (1975)
2010-9-27
Lecture 7
slide 18
Nodal Analysis
i1
+
v1
-
R3
i3
i2 G2v3
+ i4
v4 R4
-
v3 -
R1
e=0
Step 1: Write KCL:
i5
i1 + i2 + i3 = 0
-i3 + i4 i5 = 0
+
v5
-
IS5
(node 1)
(node 2)
Step 2: Substitute branch equations to rewrite KCL in branch
voltages:
2010-9-27
1 v 1+ G2*v 3 + 1 v 3 = 0
R1
R3
(1)
1 v 3 + 1 v 4 = IS5
R3
R4
(2)
Lecture 7
slide 19
Nodal Analysis
Step 3: Substitute branch voltages by nodal voltages (using KVL):
1 e1+G2(e1 e2) + 1 (e1 e2) = 0
R1
R3
- 1 (e1- e2) + 1 e2 = IS5
R3
R4
Put in matrix
form
1
1
G
+
+
2
R
R3
1
R3
(1)
(2)
1
R 3 e1 0
=
1
1 e2 I S 5
+
R 4 R 3
G 2
Yn e = S
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Lecture 7
slide 20
Regularity in MNA Matrix
i1
+
v1
-
R3
i3
i2 G2v3
i5
v3 - +
i4
e=0
v4 R4
-
R1
+
v5
-
Each element
contributes (in
conductance form)
only to the entries
with row-column
positions
corresponding to the
node numbers.
Such a regular format
is called a stamp
IS5
Stamping
1
1
1
1 R + G 2 + R
3
1
1
2
R3
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1
G 2
R3
1
1
+
R 4 R 3
Lecture 7
Coefficient matrix
slide 21
Resistor Stamp
SPICE Netlist Format (R)
Rk N+ N- value_of_Rk
N+
N-
N+
N+
Rk
Rk
Rk
N-
Rk
Rk
N2010-9-27
Lecture 7
slide 22
VCCS Stamp
SPICE Netlist Format (VCCS)
Gk N+ N- NC+
NC-
value_of_Gk
Similar to a resistor; but note that the row/col indices
are different.
Vc+
Vc-
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+
Vc
-
Nc+
Nc-
N+
Gk
G k
N-
G k
Gk
N+
N-
Lecture 7
slide 23
Current Source Stamp
SPICE Netlist Format (Current Source)
ISK N+ N- value_of_Ik
Note the signs in this case!
#
I
k
#
+I k
#
N+
+
N+
Ik
N-
N-
Right-Hand Side (RHS)
2010-9-27
Lecture 7
slide 24
Relation between STA and NA
K i1
2010-9-27
Ki
0
Kv
I
0
0 i S
AT v = 0
0 e 0
I K i1Kv
I
0
A
0
0 i K i1S
AT v = 0
0 e 0
I K i1Kv
I
0
0 AK i1Kv
0 i K i1S
T
0
A v =
0 e AK i1S
Lecture 7
slide 25
Relation between STA and NA
AK i1Kv
I K i1Kv
I
0
0 AK i1Kv
0 i K i1S
T
0
A v =
0 e AK i1S
Tableau Matrix
I K i1Kv
I
0
0
0
i K i1S
T
A
0
v =
AK i1Kv AT e AK i1S
0
MNA
After solving e, we get v, then get i.
2010-9-27
Yn
Lecture 7
Is
Y n e = Is
slide 26
Nodal Analysis -- Advantages & Problem
Advantages:
Circuit equations can be assembled by stamping
Yn is sparse (but not as sparse as STA) and small (nxn),
smaller than STA (n + 2b*n + 2b )
Yn has non-zero diagonal entries and is often diagonally
dominant
Problem:
Nodal Analysis cannot handle the following
Floating independent voltage source (not connected to
ground)
VCVS
(E-ELEMENT)
CCCS
(F-ELEMENT)
(VCCS ok!)
(G-ELEMENT)
CCVS
(H-ELEMENT)
2010-9-27
Lecture 7
slide 27
Modified Nodal Analysis (MNA)
R3
ES6
- +
+
R1
G2v3
v3 R4
R8
IS5
- +
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Lecture 7
E7v3
slide 28
Modified Nodal Analysis (MNA)
1
i1
i2
R1
R3
i3
i6
i4
+ v3 -
R4
G2v3
ES6
- +
i8
i5
R8
+ IS5
+
E7v3
i7
4
Step 1: Write KCL
i1 + i2 + i3 = 0
-i3 + i4 i5 i6 = 0
i6 + i8 = 0
i7 i8 = 0
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(1)
(2)
(3)
(4)
Lecture 7
slide 29
Modified Nodal Analysis (MNA)
Step 2: Substitute branch currents by branch voltages
2010-9-27
1 v1+G2v 3 + 1 v 3 = 0
R1
R3
(1)
1 v 3 + 1 v 4 i 6 = IS5
R3
R4
(2)
i6 + 1 v 8 = 0
R8
(3)
i7 1 v 8 = 0
R8
(4)
Lecture 7
slide 30
Modified Nodal Analysis (MNA)
Step 3: Write down unused branch equations
v = ES
6
v E v = 0
7
(4)
(5)
7 3
1
i1
i2
R1
R3
i3
+ v3 -
i6
i4
R4
G2v3
0
2010-9-27
Lecture 7
ES6
- +
i8
i5
R8
+ IS5
+
E7v3
i7
4
slide 31
Modified Nodal Analysis (MNA)
Step 4: Substitute branch voltages by nodal voltages
1 e1+ G2(e1 e2) + 1 (e1 e2) = 0
R1
R3
1 (e1 e2) + 1 e2 i 6 = IS5
R3
R4
i 6 + 1 (e3 e 4) = 0
R8
i 7 1 (e3 e 4) = 0
R8
(e3 e2) = ES6
e 4 E 7(e1 e2) = 0
2010-9-27
(1)
(2)
(3)
(4)
(5)
(6)
Lecture 7
slide 32
Modified Nodal Analysis (MNA)
branch branch
node-1
node-2
node-3
node-4
branch-6
branch-7
1
1
R1 + G2 + R3
1
R3
E7
node-1
2010-9-27
G2
1
R3
1
R3 R 4
1
0
0
1
E 7
node-2
Yn
C
R8
1
R8
1
0
1
R8
1
R8
0
1
node-3 node-4
1
0
0
0
2
0
e1 0
0
e2 IS5
0
e3
0 =
4
0
e
i6
ES6
1
i 7 0
0
0
ES6
I6
branch-6
branch-7
node voltages
B e
= RHS
0 i
some branch currents
Lecture 7
slide 33
Voltage Source Stamp
SPICE Netlist Format (Floating voltage source)
VK
N+
N-
value_of_Vk
current introduced!
N+ NN+
Nbranch k
ik
RHS
0
0
Vk
-1
-1
N+
ik
+
-
Vk
N-
2010-9-27
Lecture 7
slide 34
CCCS Stamp
SPICE Netlist Format (CCCS)
FK
N+ N- Vname
Vname NC+ NC- value
N+
NNC+
NC-
br Vc
N + N- NC + NC - ic
Fk
-Fk
1
-1
1
-1
value_of_FK
RHS
0
0
0
0
Vc
NC+
ic Vc
NC-
ik
N+
Fk ic
N-
* If Vname is used as a CC for multiple times, it is stamped only
once though!
2010-9-27
Lecture 7
slide 35
CCVS Stamp
SPICE Netlist Format (CCVS)
HK
N+ N- Vname
value_of_HK
Vname NC+ NC- value
N+ N- NC + NC- ik
N+
1
N-1
1
-1
-HK
NC+
NC-
br-k 1 -1
br-c
ic
-1
RHS
0
0
0
0
Vc
NC+
N+
ik
ic Vc
NC-
+ Hk ij
N-
* If Vname is used as a CC for multiple times, it is stamped only
once though!
2010-9-27
Lecture 7
slide 36
VCVS Stamp
SPICE Netlist Format (VCVS)
EK N+ N- NC+ NC-
value_of_EK
N+ N- NC + NC- ik
N+
1
N-1
NC +
NCbr k 1 -1 -Ek Ek
2010-9-27
NC+
N+
ik
+ EkVj
-
Vj
NC-
Lecture 7
N-
slide 37
General Rules for MNA
A branch current is introduced as an
additional variable for a voltage source or an
inductor
For current sources, resistors, conductance
and capacitors, the branch current is
introduced only if
Any circuit element depends on that branch
current; or
The branch current is requested as an output.
2010-9-27
Lecture 7
slide 38
Modified Nodal Analysis (MNA)
Advantages of MNA
MNA can be applied to any circuit
MNA equations can be assembled directly
from a circuit description (e.g. netlist)
Problem
Sometimes zeros appear on the main diagonal;
causing some principle minors to be singular
(numerical instability.)
2010-9-27
Lecture 7
slide 39
Summary
KVL/KCL + Circuit Element Equations
Equations formulation: STA and MNA
MNA was implemented in most simulators
(SPICE)
Element stamps
A key observation:
Circuit matrix structure will not change! (exploited
by SPICE for speedup symbolic factorization)
2010-9-27
Lecture 7
slide 40
Assignment 3
Implement a netlist parser that reads a simple netlist
with the following elements
R
Vsource, Isource
VCVS, CCCS, VCCS, CCVS
Print the stamps and the RHS with row and column
indices.
2010-9-27
Lecture 7
slide 41
PRINCIPLES OF CIRCUIT SIMULATION
Part 2.
Dynamic Element Stamping
2010-9-27
Slide 42
Outline
Discretization Formulas for d/dt
Element Stamps for Linear Capacitors and
Inductors
2010-9-27
Lecture 7
slide 43
Circuit with dynamic element
RC
dVc
+ Vc = Vs , Vc (0) = 0
dt
R
Vs +
-
+
Vc
C
-
Analytical solution
t
Vc (t ) = Vs 1 e
= RC
How to solve it numerically?
2010-9-27
Lecture 7
Vc (t )
Vs
slide 44
Numerical Solution
dV
+ V = Vs , V (0) = 0
dt
Assuming = RC = 1
Replace the derivative by difference
V ( t + h ) V(t)
h
+ V (t ) = Vs
h = time step (small)
There
Thereare
aremany
manyways
waysto
todo
dodiscretization
discretization..
V (t + h ) = V (t ) + h [Vs V (t )]
2010-9-27
Lecture 7
Becomes iteration
slide 45
Forward Euler (FE)
tangent at tn-1
y(t )
h
dy(t)
= f(y(t))
y (t) =
dt
tn1
tn
current time
y (t n ) y (t n 1 ) i
y (t n 1 ) = f (y (t n 1 ))
h
y (t n ) = y (t n 1 ) + h if ( y (t n 1 ) ) Direct iteration; (no
linear / nonlinear solve
involved)
2010-9-27
Lecture 7
slide 46
Backward Euler (BE)
.
dy(t)
= f(y(t))
y (t) =
dt
tangent at tn
y(t )
h
y (t n ) y (t n 1 ) i
y (t n ) = f (y (t n ))
h
tn1
tn
current time
y (t n ) = y (t n 1 ) + h if ( y (t n ) )
y(tn) appears on both sides of the
equation; need to solve y(tn) by
iterations if f() is nonlinear.
2010-9-27
Lecture 7
slide 47
FE and BE
Forward Euler:
y (t n ) = y (t n 1 ) + h if ( y (t n 1 ) )
Backward Euler:
y (t n ) = y (t n 1 ) + h if ( y (t n ) )
Although B.E. requires more computation, it is
preferred in practice because it is more
numerically stable.
Will discuss on this later.
2010-9-27
Lecture 7
slide 48
Trapezoidal Rule (TR)
tangents at both tn-1 and tn
dy (t )
y (t ) =
= f (y (t ))
dt
i
y(t )
y (t n ) y (t n 1 ) 1 .
y (t n ) + y (t n 1 )
h
2
slope of secant
tn1
tn
averaged tangent
y (t n ) y (t n 1 ) 1
[f (y (t n )) + f (y (t n 1 ))]
h
2
y (t n ) = y (t n 1 ) +
h
2
[f (y (t n )) + f (y (t n 1 ))]
Again, requires solving y(tn) from a set of
nonlinear equations
2010-9-27
Lecture 7
slide 49
FE, BE and TR
.
y (t) =
dy(t)
= f(y(t))
dt
Forward Euler:
y (t n ) = y (t n 1 ) + h if ( y (t n 1 ) )
Backward Euler:
y (t n ) = y (t n 1 ) + h if ( y (t n ) )
Trapezoidal Rule: y (t n ) = y (t n 1 ) +
h
2
[f (y (t n )) + f (y (t n 1 ))]
Trapezoidal rule has even better numerical
property than B.E.
2010-9-27
Lecture 7
slide 50
Interpretation of Trapezoidal Rule
Trapezoidal rule comes from numerical integration
computing the area under a curve
x (t ) = g (t )
x (t n ) = x (t n 1 ) +
area under the curve
tn
g ( )d
n 1
x (t n ) x (t n 1 ) +
tn1
tn
g (t n ) + g (t n 1 )
approximated by a trapezoidal
2
i
x (t n ) x (t n 1 ) 1 i
x (t n ) + x (t n 1 )
h
2
2010-9-27
g(t)
Lecture 7
Trapezoidal Rule
slide 51
Stamps of Dynamic Elements
Stamps for dynamic elements can be derived
from a discretization method:
Capacitor (C)
Inductor (L)
Others ...
2010-9-27
Lecture 7
slide 52
Capacitor Stamp
dv (t )
i (t ) = C
dt
i
N+
+ v(t )
discretized by B.E.
i (t ) =
C
C
C
(
)
)
=
(
)
v
t
v
t
h
v
t
v (t h )
[
]
h
h
h
MNA Stamp
NA Stamp
N+
N+
RHS
C
C C
v(t h)
h
h
h
C C
C
v(t h)
h
h
h
2010-9-27
treated as source
N+
N
branch C
Lecture 7
N+ N
i
1
1
RHS
0
0
C
C
C
1
v(t h)
h
h
h
C
C
v (t ) i (t ) = v (t h )
h
h
slide 53
Inductor Stamp
discretized by B.E.
i
N+
di
i (t ) i (t h)
v (t ) = L L
dt
h
L
L
v (t ) i (t ) = i (t h)
h
h
+ v(t )
N+ N
N+
N
branch L
RHS
1
0
1
0
L
L
1 1
i(t h)
h
h
(must introduce current)
MNA Stamp
2010-9-27
Lecture 7
slide 54
Stamps for C & L
NA Stamp for C
N+
N+
MNA Stamp for C
RHS
C
C C
v(t h)
h
h
h
C C
C
v(t h)
h
h
h
N+ N
N+
N
i
1
1
RHS
0
0
C
C
C
1
v(t h)
h
h
h
MNA Stamp for L
N+ N
N+
N
2010-9-27
RHS
1
0
1
0
L
L
1 1
i(t h)
h
h
Note that: Stamps for C or L
depend on the discretization
method used!
Lecture 7
slide 55
A Circuit Example
R
Vin
iV
C
v C (t ) vC (t 1)]
[
h
C
C
= [v 2 (t ) v 0 (t )] = [v 2 (t 1) v 0 (t 1)]
h
h
i c (t ) =
iL
iC
v L (t ) = L
di L (t )
dt
C
h
1
R
L
v1(t ) v 2 (t ) = [ i L (t ) i L (t 1)]
h
branch L
branch Vin 4
-1
2010-9-27
C
h
Lecture 7
1
R
iL
iV
C
h
1
R
C
1
R + h
-1
-1
-1
L
h
RHS
C
v C (t h )
h
0
C
v C (t h )
h
L
i L (t h )
h
Vin
slide 56
Assignment 4
Derive the stamps for C and L using the
Trapezoidal Rule (both in MNA).
2010-9-27
Lecture 7
slide 57
Classical Papers
1.
2.
G.D. Hachtel, R.K. Brayton and F.G. Gustavson, The sparse
tableau approach to network analysis and design, IEEE Trans.
Circuit Theory, vol.CT-18, Jan. 1971, pp. 101-119.
C.W. Ho, A.E. Ruehli and P.A. Brennan, The modified nodal
approach to network analysis, IEEE Trans. Circuits and
Systems, CAS-22, June 1975, pp. 504-509
2010-9-27
Lecture 7
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