1.

DTMF ENCODER AND DECODER

1.1 UM91215 Encoder
4.1.1 General Description

The UM91215 is a single chip, silicon gate, CMOS integrated circuit with an on chip
oscillator for a 3.58 MHz crystal or ceramic resonator. It provides dialing pulse (DP) or dual
tone multi frequency (DTMF) dialing. A standard 4 x 4 matrix keyboard can be used to
support either DP or DTMF modes. Up to 32 digits can be saved in the on chip RAM for
redialing. In the DTMF mode, minimum tone duration and minimum intertone pause provide
for rapid dialing. Maximum tone duration is dependent upon the key depression time in
manual dialing.

Pin diagram

4.1.2 Features
 One touch redial operation

 Tone/Pulse switchable

 32 digit capacity for redialling

 Automatic mixed redialling of pulse to DTMF with multiple automatic access pauses

 Hands free control function

 Wide operating voltage range: 2V to 5.5V

 Key in beep tone output

 Four extra function keys: Flash, Pause, Redial and DP or DTMF mixed dialling

 Four by Four key board can be used

 Built in power up reset circuit

4.1.3 Circuit Diagram

+5V
C 1
2 1
R 3 C 1 C 3
0 .1 u F U 2 R 2 R 4 C 2
1 18 R 1 C 4
H K R 4 R 4
2 17 R 3
3 M O D E IN R 3 16
U 3 R 2
1 2 4 OSC 1 R 2 15
OSC 0 R 1 R 1
5 14 C 3
3 .5 7 M H z 6 VSS C 3 13
VD D C 2 C 2
7 12 C 1
S E R IA L O U T TO N E C 1
8 11
9 XM IT M U T E D P 10
1

R 1 MO D E OU T KT
1K D TM F E N C O D E R U M 91215B
2

SW 1 KEY 0 SW 2 KEY 0 SW 3 KEY 0 SW 4 KEY 0

1 2 1 2 1 2 1 2

3 4 3 4 3 4 3 4

U 1
1 SW 5 KEY 0 SW 6 KEY 0 SW 7 KEY 0 SW 8 KEY 0
D T M F S E R IA L 1
B U R G _ 1 P IN 1 2 1 2 1 2 1 2

3 4 3 4 3 4 3 4

SW 9 KEY 0 SW 10 KEY 0 SW 11 KEY 0 SW 12 KEY 0

1 2 1 2 1 2 1 2

3 4 3 4 3 4 3 4

DTMF ENCODER SW 13 KEY 0 SW 14 KEY 0 SW 15 KEY 0 SW 16 KEY 0

1 2 1 2 1 2 1 2

3 4 3 4 3 4 3 4

4.1.4 Block Diagram

4.1.5 Key Board Assignment

1. */T – At pulse mode this key works as pulse – DTMF key, at DTMF mode the key
works as * key. */T key will occupy one memory digit in either use.

2. F1 – Flash key, the break time is 297ms or 96ms

3. F2 – Flash key for break time 640ms

4. P – Pause key (2.2 sec)

5. RD – One key redial

6. # - At pulse mode this key input is neglected, at DTMF mode this key works as # key.

1.2 MT8870D Decoder

4.2.1 General Description

The MT8870D/MT8870D-1 is a complete DTMF receiver integrating both the band

split filter and digital decoder functions. The filter section uses switched capacitor techniques
for high and low group filters; the decoder uses digital counting techniques to detect and
decode all 16 DTMF tone pairs into a 4-bit code. External component count is minimized by
on chip provision of a differential input amplifier, clock oscillator and latched three-state bus
interface.
4.2.2Features

• Complete DTMF Receiver

• Low power consumption
• Internal gain setting amplifier
• Adjustable guard time
• Central office quality
• Power-down mode
• Inhibit mode
• Backward compatible with MT8870C/MT8870C-1

4.2.3 Circuit Diagram

U1
C1
1
D T M F S E R IA L 1
1 2
S E R IA L IN
B U R G _ 1 P IN
2

0 .1 u F R1
100E

+5V
C2
1

1 2
1

R2
U2 0 .1 u F C3
15K
1 18 1 R3 2 1 2
2 IN + VDD 17 750K
IN - S t/G T
2

3 16
4 GS ESt 15 0 .1 u F
VR ef S tD D TM F IN TR
5 14 D TM F 3
6 IN H Q4 13
PW DN Q3 D TM F 2
U3 7 12 D TM F 1
1 2 8 OSC1 Q2 11
OSC2 Q1 D TM F 0
9 10
VSS TO E
3 .5 7 M H z
D TM F D E C O D E R M T8870

DTMF DECODER
 4.2.4 Block Diagram

4.2.5 Filter Section

Separation of the low-group and high group tones is achieved by applying the DTMF
signal to the inputs of two sixth-order switched capacitor bandpass filters, the bandwidths of
which correspond to the low and high group frequencies. The filter section also incorporates
notches at 350 and 440 Hz for exceptional dial tone rejection (see Figure 3). Each filter
output is followed by a single order switched capacitor filter section which smooths the
signals prior to limiting. Limiting is performed by high-gain comparators which are provided
with hysteresis to prevent detection of unwanted low-level signals. The outputs of the
comparators provide full rail logic swings at the frequencies of the incoming DTMF signals.

4.2.6 Decoder Section

Following the filter section is a decoder employing digital counting techniques to
determine the frequencies of the incoming tones and to verify that they correspond to
standard DTMF frequencies. A complex averaging algorithm protects against tone simulation
by extraneous signals such as voice while providing tolerance to small frequency deviations
and variations. This averaging algorithm has been developed to ensure an optimum
combination of immunity to talk-off and tolerance to the presence of interfering frequencies
(third tones) and noise. When the detector recognizes the presence of two valid tones (this is
referred to as the “signal condition” in some industry specifications) the “Early Steering”
(ESt) output will go to an active state. Any subsequent loss of signal condition will cause ESt
to assume an inactive state.

4.2.7 Applications

• Receiver system for British Telecom (BT) or CEPT Spec (MT8870D-1)

• Paging systems
• Repeater systems/mobile radio
• Credit card systems
• Remote control
• Personal computers
• Telephone answering machine