Function Block cs3000
drawing200 Function Block
: cs3000
s tart , s top : -
s tart , s top : -
Q32 J32
A logic chart block LC64 has 32 inputs, 32 outputs and 64 logic elements.
:
FCS 256 :Global Switch -1
FCS
FCS 4000 :Common Switch -2
FCS
Switch -
400 200 Switch Def -
Gswitch Def Global Switch-
-
1-Logic Chart Block
2- Sequence Table Block Logic Chart Block
Logic operator Symbol Action Notes
Logic product
AND (Max. inputs 21.)
Logic sum
OR (Max. inputs 21)
NOT Negation
SRS1-R
Flip-flop
(Reset dominant)
SRS2-R
Logic operator Symbol Action Notes
SRS1-S
Flip-flop
(Set dominant)
SRS2-S
WOUT (W.O) Wipeout
IN t
OND ON-delay timer
OUT
IN
t OFF-delay
OFFD
OUT timer
Logic operator Symbol Action Notes
IN 1 scan One-shot
TON (Rise trigger)
OUT
IN
1 scan One-shot
TOFF (Fall trigger)
OUT
CMP-GE Comparator
CMP-GT Comparator
CMP-EQ Comparator
AND NOT
S
OUT
One wipeout operation is counted as two logic operation elements.
-
-
-
LC64
AND
OR
SR-FF
L0011.F SL0012
P UMP 001
LC64
LSL002
LSH 002
LSH 002
LOW
SR
LC64
Se que nc e Table
H L LC64
Se que nc e Table
Se que nc e Table
ST16 ,ST16E
Sequence Table
1-ST16 (Basic):
I/O I/O
32 rules
Input condition Y N
Total 64 I/O Condition rules
YN
points (fixed) Y
Output action Action rules
YN
(2) ST16E (Extension):
ST16
32 rules
Y N
Total 64 I/O Input condition Condition rules
YN
points (fixed) Y
Output action Action rules
YN
No. of condition signals No. of action signals
8 56
16 48
24 40
32 (default) 32 (default)
40 24
48 16
56 8
: Sequence Table
Middle size table: M-ST16, M-ST16E
Large size table: L-ST16, L-ST16E
(1) M-ST16, M-ST16E:
I/O
(2) L-ST16, L-ST16E:
I/O
ST16E Sequence Table *
ST16
Sequence
table group
Sequence table group STEP -
step Step -
Sequence Table ST16 step -
group
control drawing Extending table Extended table-
Step 1 to 15 Step 16 to 35
32
rules
Input Condition rules
Condition signals connection Condition
Total 32 (default) information specification
I/O signals
Total 64
(fixed)
Action signals Output Action rules
connection Action
Total 32 (default) specification
information
Processing timing Scan period
Step label
Condition
signal
comment
Action
signal
comment
Next step label
Rule expansion destination tag name
.
ST16
%SW0200
ON
%Z011101 Rule 01 02 03 . . . . . . . . . . 32
%SW0201 ON Step
ON C01 %[Link] ON Y N
. %[Link] ON Y
AND logic circuit . %[Link] ON Y
. %[Link] ON Y
%SW0202 C32 (Condition signals)
ON A01 %[Link] H Y
%Z011102 . %[Link] H Y Y
%SW0203 ON . %[Link] H Y
ON .
A32 (Action signals)
OR logic circuit
THEN
ELSE
%SW0200 %SW0200
OFF ON
NOT logic circuit
: Log ic c hart Sequence table
(T):
(one-shot)(O):
. function block
(I) Initial execution/Restart execution
sequence table restart
hot restart
(B)Initial execution
RESTART FCS
: Sequence Table
(C)
(E)
Default
:TC
. acknowledge
:TE
Rule 01 . . . . . . . . . . . . . . . 32
Rule 01 . . . . . . . . . . . . . . . 32
Step Step
C01 %SW0200 Y C01 %SW0200 Y
. %SW0201 Y . %SW0201 Y N
. %SW0202 . %SW0202 N
. .
%SW0203 %SW0203
C32 Condition signals C32 Condition signals
A01 %Z011101 Y A01 %Z011101 Y
. %Z011102 Y
. %Z011102 Y . %Z011103
. %Z011103 N .
.
A32 Action signals
A32 Action signals
THEN
THEN ELSE
ELSE
Actions are executed in order of %Z011101, %Z011102, %Z011103.
%SW0200 and %SW0201 are ON and then %Z011101 turns ON.
%SW0201 and %SW0202 are OFF and then %Z011102 turns ON.
Rule 01 . . . . . . . . . 32
Step
C01 %SW0200 Y
. %SW0201 Y
. %SW0202 Y Y
. %SW0203 Y Y
C32 Condition signals
A01 %Z011101 Y N N
. %Z011102 Y
. %Z011102 N
.
A32 Action signals
THEN
ELSE
When conditions in 3 rules are satisfied,
Y is executed. (Y has a priority.)
When conditions in 2 rules are satisfied, Y and
then N is executed. ( Executed from top to
down.)
Rule
Step 04 05 08
C01 %SW0200 Y
. %SW0201 Y
. %SW0202 Y
. Y
%SW0203
C32 Condition signals
A01 %Z011101 Y
. %Z011102 Y
.
%Z011103 Y
.
A32 Action signals
THEN 05
ELSE 08
Step label
Tested rules
Next step label (THEN label)
Next step label (ELSE label)
Rule
Step 04 05 08
C01 %SW0200 Y
. %SW0201 Y
. %SW0202 Y
. %SW0203 Y
C32 Condition signals
A01 %Z011101 Y
. %Z011102 Y
. %Z011103 Y
.
A32 Action signals
THEN 05
ELSE 08
When the condition of the rule in step
04 is satisfied, the step advances to
05.
Rule
Step 04 05 08
C01 %SW0200 Y
. %SW0201 Y
. %SW0202 Y
. %SW0203 Y
C32 Condition signals
A01 %Z011101 Y
. %Z011102 Y
. %Z011103 Y
.
A32 Action signals
THEN 05
ELSE 08
When the condition of the rule in step 04
is not satisfied, the step advances to 08.
ST16
NOT OR AND
ST16
Start
Hig h
LV0011 LSHH0011
(LV0012)
LSLL0011
.
An example of the timer block operation.
Counting Processing Timing: TC
process PV OUT
%[Link] ON Y
(CTUP)
Timer start [Link] CTUP Y
switch
Function block diagram Timer count-up
Timer start/stop [Link] START Y N
%[Link] H N
BSTS: Block status Start switch off
CTUP: Count-up
OP: Operation
TART: Start/stop action
Start command Stop command
:
.
SO - 2 SO - 1 SI - 2 SI - 1
SIO - 22 SIO 21 SIO 12 SIO 11
SIO 22P SIO 12P
Block symbols: SIO 22P
Switch instrument Input Output No. of input No. of output Pulse I/O
ANS
Force -
Proximity ON/ OFF VALVE -
SI1,SIO21 -
SI1 ZSH0001
Forc e
XV0001 SIO-21
XV
OFF OPEN -
PERR ON ANS+
PERR On CLOSE -
ANS_ OFF
-
XV AUT -
LC64
IL TT
(Trip) :TT(Te rm inal Trip)
loc k
:IL(Inte rloc k)
TT, IL
. TT
m ode :INT(Software Inte rloc k)
STOP MAN AUT
TSI(Trac king Switc h
loc al, Re m ot :Inte rloc k)
Loc al
m ode
loc al
TRK Fac e plate
:FB(Fe e dbac k)
MC-2
IN, TT, IL, INT, TSI, FB, OUT
LC64
AUT
LC64
Bas ic
fast,medum fcs
faceplate
faceplate
MC-2 MODE2
MC-3 MODE3
MC-2
Faceplate
Faceplate
Faceplate
MC-2
ANS close open
MC-2
DCS local
INTERLOCK
Interlock
Close FC open FO
fcs
MAN
OFF
MC-2
Tuning
:MTM
BPSW(By Pass Switch)
:BPSW=0
Bypass RUN :BPSW=1
run
Bypass Interlock :BPSW=2
Bypass Interlock,RUN:BPSW=3
out of service mode :BPSW=4
OPEN LOOP
CLOSE LOOP
PVI(Proc e s s value Indic ator)
AI .
MODBUS
SUBSYS
CUNTER PVI
aut
(damping)
ESD
process variable pv
pv pv
Velocity pv position
PV+ PV
pv mode
save Trend Se rve r
Trend :Stop/resume display
sp :Velocity limiter
Counter :sum
:Operation mark
faceplate
Common/opMark
PV=SV PID
c=close o=open Faceplate
co
Open close-open
Reverse pv<sv
pv<sv
Direct
AUT MODE
SP PV SLAVE
100
YES
MAN AUT Faceplate NO :MAN mode
. PV SP AUT PV
SP PV YES
P,I,D :3
PV P,D I I-PD :1
PI-D :2
CAS PI-D AUT I-PD :0
DEFALT I
pid :I/O Compensation
p pid
GW(Gap wide)
GW
GAP :GAP
p :Squared Deviation
yes
MV
YES
MAN
AUT
Cas c ade Control
opening
cascade
Reverse Mode Control Action -
Reverse Fo -
IMAN(Initialize Manual) cascade -
CAS slave
MODE FT Cascade -
Bypass FIC PRD CAS FIC
PID
GE :
GT :>
EQ : =
LE : <
LT :
PID MV
Calc ulation Bloc k
calculation
c alc ulation
mv
Split Rang Bloc k
Split
spilt
Split Rang Bloc k
Split Rang Bloc k
IMAN c as s plit -
sw s plit Download
Sw=0 oos(out of service)
sw=1
Sw=2
split
PVI -
CAL -
MLD-SW:(Manual Loade r Bloc k)
:
-
SPLIT -
MAN MAN SPLIT
MAN MLD
Split Rang Bloc k
Split Rang Bloc k
Ove rride MLD-SW
TSW,TIN
TSW : Trac king Switc h Word
TIN : Trac king Input
If : TSW=0 SPLIT
SPLIT
If:TSW=1
Tracking switch
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