A Better ORing Diode for Intermediate Bus Voltages

Sue Nee Alan Ball

ASIP Marketing Manager Applications Engineering Manager
ON Semiconductor ON Semiconductor
5005 E. McDowell Rd. 5005 E. McDowell Rd.
Phoenix, AZ 85008 Phoenix, AZ 85008
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Abstract
This paper discusses a novel approach to improve the efficiency over the present solution of using Schottky
diodes in an ORing application. The efficiency performance advantage of the new solution is calculated. The
performance advantage of this new solution is compared to some recently introduced solutions from competitors M
(two chip solution) and P (single chip solution).

Introduction volt Schottky rectifier, with a 10 amp load current

ORing diodes are a necessary evil of high and a 100°C junction temperature, the power loss is:
reliability systems. They are used to isolate
redundant power sources so that a failure of one Ploss = 0.45V x 10A = 4.5W
source will not bring down the entire system. There
are several inherent problems associated with this Even for a TO-220 package, this is a lot of heat
isolation system. to dissipate.
One of those problems is the loss due to the The other problem with Schottky diodes is their
insertion of a component directly into the power path. leakage. Depending on the worst case junction
The full load current must pass through this device temperature, the leakage can be significant. This
and the associated power loss is simply that load diode has a leakage current of 8 mA at a 125°C
current multiplied by the voltage drop across the junction temperature and a 10 volt reverse bias.
device. That’s 80 mW of dissipation when it is in it’s off
This can be a substantial amount of power, and state.
along with decreasing the efficiency of the system, it
generates heat in the isolation diode which must also FET Diodes
be dealt with. An alternate solution is to substitute a power
The other issue associated with isolation diodes MOSFET for the Schottky rectifier. This has the
is the reverse recovery time. When a short circuit advantage of a lower forward drop, but added
occurs in one of the sources, this device must limit complexity due to the required drive circuitry and
the flow of many amps of current in a very short slower turn off time. This solution also requires an
period of time. If not, the bus can be degraded to the external bias voltage to operate the gate of the FET,
point where the load will fail due to undervoltage or assuming that an N-channel device is used.
transient conditions. In order to meet the same forward drop as the
Shottky diode in the above example, a FET would be
The Schottky Diode Solution required with an RDSon of:
Schottky diodes are a simple method of
providing isolation in such a system. They are 4.5W
simple to use, have a lower voltage drop than a R DSon = = 45mΩ
conventional silicon rectifier and have a very fast 10 A 2
recovery time.
All this said, there are two problems with This on resistance can be easily obtained with
Schottky rectifiers. The forward drop is still a good current low voltage FETs that are available on the
fraction of a volt. If we use an MBR1635 16 amp, 35 market. The difficulty comes in designing a circuit
that can accurately and quickly detect a change in
 polarity, so that the FET can be turned off before the
bus voltage is degraded to the point where the system This device was designed to function as similarly
crashes. as possible to an actual diode. The comparator
Even with some of the high speed comparators senses the polarity of the voltage across the “diode”
available on the market today, it is quite a challenge and turns the FET on when the body diode is forward
to couple that with a driver and minimize the biased and off when it is reverse biased.
switching delays to achieve speeds in the 100 ns It was necessary to design the comparator with a
range, that would allow for reliable fault protection in small offset voltage to keep the device stable. When
the event of a shorted source. the current through the diode initially switches to the
FETs with on resistances as low as 2 mΩ exist forward conducting mode, the FET is not on, and the
today, with voltage ratings of 20 to 30 volts. A 2 mΩ body diode conducts. Figure 2 shows the waveforms
FET would have a total loss of: for the voltage and current through the FET/body
diode.
Since no comparator is perfect, there will always
PLoss = 10 A 2 ⋅ 0.002Ω = 0.2 W be some offset. If the offset were ever negative, the
device would oscillate at low currents. This is due to
the fact that the forward voltage across the body
This results in a power savings of 4.3 watts, or a diode will always be in the hundreds of millivolts
decrease in ORing losses of 96%. It also eliminates range, but the drop across the FET may only be a few
any need for heatsinking of the ORing diode. millivolts. If the offset is between these two levels,
This is overkill for this application and a less the device will switch between its off state, in which
expensive FET could easily be used. Even a 10 mΩ case the body diode is conducting, and its on state, in
FET would only dissipate 1 watt. This is quite easy to which case the voltage drop is the current multiplied
do in existing semiconductor packages with little or by the on resistance of the FET.
no heatsinking.

Better ORing Diode Solution Vrev

The solution is to integrate as much circuitry as
possible. This allows optimization of interface
impedances between the comparator, driver and FET. Offset
There are several solutions on the market, each using Vsat 0 amps
Vfwd
a slightly different approach.
The BORing diode is a hybrid rectifier
consisting of a high speed analog control circuit, 24 I fwd
volt power MOSFET and decoupling capacitor. The
MOSFET is operated in the third quadrant, making
the source of the MOSFET the anode and the drain
the cathode. Figure 1, illustrates the design of this
device.
I rev
Reg In Cathode
Figure 2. BORing Diode Waveforms
Voltage
Regulator
The offset voltage is accurately designed to be
5V
five millivolts positive. This assures stable operation,
but also increases the propagation delay time of the
circuit, since the current has to actually go past zero
and into the reverse polarity, before the comparator
can respond. The current required to trip the
Gate Anode comparator must be 2.5 amps positive for a 2
milliohm on resistance.
Figure 1. Block Diagram of BORing Diode
 Typical propagation delays have been measured
at 100 ns, with the total time required for the current
to recover at 260 ns. 3
2
4
1

Pins:
1 - Anode (source)
2 - 5 volts
3 - Gate
4 - Cathode (drain)
5 - Reg-in

Figure 3. BORing Response to a Short Circuit Figure 4. BORing Diode Footprint

Figure 3 shows the current through the BORing

diode in the top trace, on a scale of 1 amp/div, and Other Solutions
the gate drive signal on the lower trace. The delay Several other manufacturers have designed
times are measured from the time at which the solutions using a FET and controller. Company M
current drops to zero. The reverse current can be has a controller that drives an external FET. The
seen to be about 0.5 amps, and lasts for a duration of advantage of this is that the user can select the FET.
260 ns. The disadvantage is that the impedances between the
The turn off speed of this device was the top driver and FET gate are greater, and the switching
priority for the design. This began with the electrical speed will be slower and more likely to ring at turn
design of the integrated circuit. The comparator and off. The signal quality of this type of device is very
driver were both designed to optimize speed above dependant on the skill of the pcb designer.
all else. This included allowing for more shoot- The current sense threshold for this part can be
through current in the driver than would normally be as high as 40 mV. This means that if a 4 mΩ FET is
allowed. Even with speed being the number one used, the reverse current must equal 10 amps before
priority, the bias current is only 2 mA when the the circuit even begins to turn off.
device is not switching. This device includes an internal charge pump to
After the electrical design was completed, the provide the gate voltage for the n-channel FET. The
layout of the die was done such that the high current, advertised turn off time for this device is 300 ns. This
high speed paths were as short as possible – is from the time that the fault is sensed to the time the
especially the output stage of the driver. The package gate drive goes low. The time from the beginning of
for the die was then designed for optimum speed. the fault until the current is shut off is of course
Included in this package are the dice for the driver longer.
and power FET as well as an internal bypass Company M’s product also includes over and
capacitor. This optimization resulted in a rather undervoltage sensing and a fault flag to signal an
unusual footprint for the BORing diode. overvoltage, undervoltage or reverse current
condition.
Company P has an integrated solution combining
controller and FET. This device has a 2 mΩ internal
FET for a very low forward drop. It also has a All photos are shown on the same current and
thermal fault flag and remote voltage sensing. time scales. The gate signal for Company P’s device
was not shown, as it is an internal signal.
Test data
A test board was designed to allow all three
devices to be tested under nearly identical conditions.
One input was set 50 millivolts above the other, and
then shorted. The diode of the higher source was Current 2.5 A/div
monitored for its current, which is shown in the
following waveforms. Before the event, there is 0.50
amps of load current flowing in the diode. The
current probe measured the current in the diode
0.5A
between the short and the load, so that it can be seen
going to zero once the diode had turned off.
260ns

Gate

12.00 V Load

Source 1

Figure 7. BORing Diode Waveforms

19V Current
I2 Probe

12.05 V

Source 2
Current
2.5 A/div
Figure 5. Short Circuit Test Circuit

1.7us

Gate
10A

Figure 8. Company M’s Waveforms

Figure 6. Short Circuit Test Board with

BORing Diode Mounted.
 Output Voltage

2.5 A/div

3.5A

480ns

Figure 9. Company P’s Waveforms

Conclusion
While all devices performed the ORing function,
there was a significant difference in the speed and
magnitude of the reverse current pulse that occurred
when the conducting input was shorted. This
transient can have a significant effect on the system
bus voltage, and in some cases may cause the system
to crash if excessive ringing or voltage spikes occur.
Turn off speed is the critical factor in minimizing
the disturbance to the bus for a solid state ORing
diode. It can make the difference between a robust,
reliable system and once that experiences random
failures.