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Half Adder Design by S M Rahid Haque

This document discusses the logic design of a half adder. It provides the truth tables for the sum and carry out outputs of a half adder for the four possible input combinations of 0 and 1 on two input bits. The truth tables show the sum and carry out output for each of the 00, 01, 10, and 11 input states.

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38 views5 pages

Half Adder Design by S M Rahid Haque

This document discusses the logic design of a half adder. It provides the truth tables for the sum and carry out outputs of a half adder for the four possible input combinations of 0 and 1 on two input bits. The truth tables show the sum and carry out output for each of the 00, 01, 10, and 11 input states.

Uploaded by

faruk
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Name: S M RAHID HAQUE ID: 17-33107-1

1. Half Adder Design:


For Half Adder Cout:
Logic: 00

Logic 01
Logic 10

Logic 11
For Half Adder Sum:
Logic 00

Logic 01
Logic 10

Logic 11
2 & 3.

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